To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-kernel@vger.kernel.org, Jeff Garzik <jeff@garzik.org>
Subject: Re: 2.6.18-rc5 + pata-drivers on MSI K9N Ultra report, AMD64
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From: Krzysztof Halasa <khc@pm.waw.pl>
Date: Mon, 04 Sep 2006 14:18:07 +0200
In-Reply-To: <1157368595.30801.23.camel@localhost.localdomain> (Alan Cox's message of "Mon, 04 Sep 2006 12:16:35 +0100")
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Alan Cox <alan@lxorguk.ukuu.org.uk> writes:

>>         static struct pci_bits amd_enable_bits[] = {
>>                 { 0x40, 1, 0x02, 0x02 },
>>                 { 0x40, 1, 0x01, 0x01 }
>>         };
>
> The Nvidia ones have the register base at 0x50. Looking at the code I
> think its just a case of adding an 0x50 based enable_bits test to
> nv_pre_reset, and I'll fold that in now.

I see. Thanks again.
-- 
Krzysztof Halasa

-- 
VGER BF report: H 1.57724e-07
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