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[23.128.96.18]) by mx.google.com with ESMTP id z23si13598267edx.444.2020.12.23.03.08.31; Wed, 23 Dec 2020 03:08:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=p3zJlQz9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728515AbgLWLHN (ORCPT + 99 others); Wed, 23 Dec 2020 06:07:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728503AbgLWLHM (ORCPT ); Wed, 23 Dec 2020 06:07:12 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A595C061794 for ; Wed, 23 Dec 2020 03:06:32 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id j13so3025281pjz.3 for ; Wed, 23 Dec 2020 03:06:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WOYP5E3jVy3ELBPtvkaJkjlrVuze1hWdvp4c36IdX2U=; b=p3zJlQz9Vlmt36EFHGxNdzwYc4aV+7XCBflEqgsTMb4FTSKRZYqq2Kgc3l05TNhmoe TrEhfhVw3v57V994HdPezMp64a38t6W4la0KAlq4CgYPTaGPMwyfK7g2XcBh+QuYSepw 0HWs3qxskX56JfLec1g2i209x5d/WUYbU7PSI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WOYP5E3jVy3ELBPtvkaJkjlrVuze1hWdvp4c36IdX2U=; b=O4E14je64Ls1XKZoGCNjb8vFbTXsKMSgLDVDcORdNvNd9KuKvyyhd2BGD50oEnzR/7 HPS544IN8MopFoZTeMXII7L+CFdu6A90IX2mr5wrO+WMQP60Uarwa2Ul3L7UV0vnHPAB gabT5CNGRCoEQ07DvI1qKr9JNSsgfP9P6xBcIYKuj1jFKp9cJAwPXSOQLphlPxDPJ1TE lttYYf2apq3nmvO5hNJCaBZvG0fLepWzfR2AU95U9r8r79xzN+FWO3PLBTnPMHdxje6o s+r4zx4ZBMNBGR2rSkDc6rm+BGcP87Aws8PTSYvYotKcGJJ6CvNnYdLFrIZPvKaCdb8G XOuQ== X-Gm-Message-State: AOAM533gdTg9azvMT7b7dg8jS7Aq1F2pvHJodwsmaoAVyd7zeKtd0fw0 PV2UqIWHRDasEPqcC89JzqN4rg== X-Received: by 2002:a17:90a:cc0a:: with SMTP id b10mr25930062pju.59.1608721592088; Wed, 23 Dec 2020 03:06:32 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:eca4:40c1:8784:571c]) by smtp.gmail.com with ESMTPSA id 3sm23275909pfv.92.2020.12.23.03.06.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Dec 2020 03:06:31 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki , Catalin Marinas , Will Deacon , Matteo Lisi Subject: [PATCH v3 6/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit Date: Wed, 23 Dec 2020 16:33:43 +0530 Message-Id: <20201223110343.126638-7-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201223110343.126638-1-jagan@amarulasolutions.com> References: <20201223110343.126638-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once Mainline Linux supported. Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- Changes for v3: - don't maintain common nodes and include it, if no feature diff Changes for v2: - updated commit message - dropped engicam from filename since it aligned with imx6 engicam dts files naming conventions. arch/arm64/boot/dts/freescale/Makefile | 1 + .../freescale/imx8mm-engicam-edimm2.2.dtsi | 82 +++++++++++++++++++ .../freescale/imx8mm-icore-mx8mm-edimm2.2.dts | 21 +++++ 3 files changed, 104 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 8d49a2c74604..43783076f856 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi new file mode 100644 index 000000000000..f7870efd9dab --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +&fec1 { + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; +}; + +&iomuxc { + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 + >; + }; + + pinctrl_usdhc1_gpio: usdhc1gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 + >; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +/* SD */ +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; + cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + max-frequency = <50000000>; + bus-width = <4>; + no-1-8-v; + pm-ignore-notify; + keep-power-in-suspend; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts new file mode 100644 index 000000000000..672aee1800c4 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +/dts-v1/; +#include "imx8mm.dtsi" +#include "imx8mm-engicam-edimm2.2.dtsi" +#include "imx8mm-icore-mx8mm.dtsi" + +/ { + model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit"; + compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm", + "fsl,imx8mm"; + + chosen { + stdout-path = &uart2; + }; +}; -- 2.25.1