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[23.128.96.18]) by mx.google.com with ESMTP id dc18si19980987edb.76.2020.12.27.13.31.25; Sun, 27 Dec 2020 13:31:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="J5P/Mg6E"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726429AbgL0Vac (ORCPT + 99 others); Sun, 27 Dec 2020 16:30:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726244AbgL0Vab (ORCPT ); Sun, 27 Dec 2020 16:30:31 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F21BC061795 for ; Sun, 27 Dec 2020 13:29:50 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id y19so19954716lfa.13 for ; Sun, 27 Dec 2020 13:29:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=aTYaA/nk5rfxrjXMV9Zf6ReLTziBhlVMG7XuAP4a5t8=; b=J5P/Mg6E+/zhNhboLMKs7TkvDI8fqb3RuPdLB32RXXdwcNDIxDI4ZMJOSn9kRMH9lW ATXSxQ/SO/FjGNfp0QsladSzDjqr3DQNInBQVPqZS425ZN3oUKTQ9q81JC9myq8QwDjC VtGxnyk1K3UWqL/6404Pwzfo63D2GgFwveeSVLJDGM0JOLFsevJ+RxyCR7d3PG4+1jW1 sEIRYVN7tF1MrzwdqMAIDjxjjIer4iGJRe2e64tX9thJGwq/ON7x3wZworJjitibqlhF 8zamHCdpNihGp/GuPEnBR18p4qV7DhcDJ0Zz1a0W5av7mMR1X4itMiaHF2iHkdADS1jM vHQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=aTYaA/nk5rfxrjXMV9Zf6ReLTziBhlVMG7XuAP4a5t8=; b=t0PfcMQSRDYclCoF2fiSJXauD1gDJo45IFDwdIPApCBBiJi3mG5EHBgKqEAi5v0nXT NFgZFV2xvL8+AGhoD/0cEmMddSxKK1t0zM1mR6pam8DNzkjfnOtUT6BDFhKGmTmRISSk Pe7I/uCjgJo/QX7oR9ZHXPKiBDbVG8VNwAS4ufTNcLGcwFGdJRNdIwVxUrMgE4yB9xax jtUg9TYMyIe0OjfXfrbgkuEHVnxLMwETNJswzvo7iIS9sXMG/I+gKmVZpdsneRHsxhm0 Q3ouXLCzWX4IMWkMQ/frSux/BBFbRjFe0H+A4d1VL1GKdjwArdMem372fVuQydSNTF/e vACg== X-Gm-Message-State: AOAM533Qt3vRq9a+beACUoYx7Pk5reiIWmjjMKYQ0vxAlY3m0luozjD7 +qqpKiOFIp9ywQlpJi7Kgu2rZlE3+wu7sapeNvuXjw== X-Received: by 2002:a2e:b047:: with SMTP id d7mr19629137ljl.467.1609104589062; Sun, 27 Dec 2020 13:29:49 -0800 (PST) MIME-Version: 1.0 References: <5041c8cfc423f046ca9cf4f8f0a8bd03552ab6ea.1608963095.git.syednwaris@gmail.com> In-Reply-To: <5041c8cfc423f046ca9cf4f8f0a8bd03552ab6ea.1608963095.git.syednwaris@gmail.com> From: Linus Walleij Date: Sun, 27 Dec 2020 22:29:38 +0100 Message-ID: Subject: Re: [PATCH 4/5] gpio: xilinx: Utilize generic bitmap_get_value and _set_value To: Syed Nayyar Waris Cc: Andy Shevchenko , William Breathitt Gray , Michal Simek , Arnd Bergmann , Robert Richter , Bartosz Golaszewski , Masahiro Yamada , Andrew Morton , Zhang Rui , Daniel Lezcano , "(Exiting) Amit Kucheria" , Linux-Arch , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" , Linux ARM , Linux PM list Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Dec 26, 2020 at 7:44 AM Syed Nayyar Waris wrote: > This patch reimplements the xgpio_set_multiple() function in > drivers/gpio/gpio-xilinx.c to use the new generic functions: > bitmap_get_value() and bitmap_set_value(). The code is now simpler > to read and understand. Moreover, instead of looping for each bit > in xgpio_set_multiple() function, now we can check each channel at > a time and save cycles. > > Cc: William Breathitt Gray > Cc: Bartosz Golaszewski > Cc: Michal Simek > Signed-off-by: Syed Nayyar Waris (...) > +#include <../drivers/gpio/clump_bits.h> What is this? Isn't a simple #include "clump_bits.h" enough? We need an ACK from the Xilinx people that they think this actually improves the readability and maintainability of their driver. Yours, Linus Walleij