Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp9465614pxu; Mon, 28 Dec 2020 17:32:23 -0800 (PST) X-Google-Smtp-Source: ABdhPJzejTEWQrE2sZAi4JQjz9xZ4D4ZP6xvmErSr+pkXYFU9jzl+OeGTjwsfVvhRIH3QZdFeadv X-Received: by 2002:a50:875b:: with SMTP id 27mr45172046edv.24.1609205543610; Mon, 28 Dec 2020 17:32:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609205543; cv=none; d=google.com; s=arc-20160816; b=Y5H1ezyWPoBDLkoozIttr47TsM0Olq1W+CkSMywyjvhlJuw0ndzeKZDZhDnmuT/aW1 LbMY2o5gFQlUnos+S+6chTs+H2R8ekaqwqQavZ0Ie/eheErIS+YOsC8uh59uPQAOsRVp PTxMEIaC8XCp/0Q8WaNGLdXB2HmUgPPka6v8a7a2Jd8gNFSGa+I9SrP9eWuEsdwMjCW+ h/+i2ku039TZOflVpvFDPwCo8+JFu9vBYNDJPQyZ6RG54tTFD0u9RwGi+65BSDpDSZSg raBq4/Hu2GmRvyAlgTeYXDpTo0xnsYh+wd/R7dCqwhFMIV9HNG2ygMB2ZNwDCzP5cCdv wp2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=vztAADtJ7CpalbrXXmjuQR26CEK7nLfUOKrj98A/PmI=; b=onnJ832IC8fXtPQYp18g6u1MuLdeKDG7t3I8DnqDUiPWjRLWCseqViM1Rg3CYFiaVt 03SabQqH2dMmolzrB+ITFnjiImNBkfIMTH62nGeyerTQhPx71u0J6j44Rg2zQ5NMDsWZ bwICxJwgkprh12zB2slag5d747cvU6BJLfnHfcs7VOuuF+41Jj+D09eRyhhcOUO2qm0i snSPEbuQsXJqdzAsYnExpzPlkNn2PNCrpFylR7bBs7gH+nkwXJnnpRPiyS03Xb2XgyGV MFS/mEvVuikf3v0dKf11N6lHQ2gk1HTKTMNGWLd2huhkhefRORUGAfuK4W7xEiZgvZus doFg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f13si20804186edw.454.2020.12.28.17.32.00; Mon, 28 Dec 2020 17:32:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731772AbgL1W4V (ORCPT + 99 others); Mon, 28 Dec 2020 17:56:21 -0500 Received: from lists.gateworks.com ([108.161.130.12]:47122 "EHLO lists.gateworks.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729553AbgL1Vqh (ORCPT ); Mon, 28 Dec 2020 16:46:37 -0500 Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by lists.gateworks.com with esmtp (Exim 4.82) (envelope-from ) id 1ku0S9-0005Zf-Nx; Mon, 28 Dec 2020 21:53:22 +0000 From: Tim Harvey To: Mark Brown , "Rafael J . Wysocki" , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Laxminath Kasam , Tony Lindgren , Lee Jones Cc: Tim Harvey , Robert Jones Subject: [PATCH] regmap: irq: do not allow setting irq bits during ack Date: Mon, 28 Dec 2020 13:45:51 -0800 Message-Id: <1609191951-15590-1-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some interrupt controllers may not de-assert their interrupt if bits are set when acknowledging the bits that caused the interrupt. Take care to not apply the mask to the status until we are done acknowledging the interrupt and take care to mask the bits according for the ack_invert state. This is needed to avoid a stuck interrupt case for the Gateworks System Controller which uses ack_invert. If the status has the mask applied before clearing the bits it will end up setting bits that are enabled but were not the cause the interrupt which will keep the GSC from ever de-asserting its interrupt. Cc: Tony Lindgren Cc: Laxminath Kasam Cc: Robert Jones Signed-off-by: Tim Harvey --- drivers/base/regmap/regmap-irq.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c index ad5c2de..560c641 100644 --- a/drivers/base/regmap/regmap-irq.c +++ b/drivers/base/regmap/regmap-irq.c @@ -496,29 +496,29 @@ static irqreturn_t regmap_irq_thread(int irq, void *d) * doing a write per register. */ for (i = 0; i < data->chip->num_regs; i++) { - data->status_buf[i] &= ~data->mask_buf[i]; - - if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) { + if ((data->status_buf[i] && ~data->mask_buf[i]) && + (chip->ack_base || chip->use_ack)) { reg = chip->ack_base + (i * map->reg_stride * data->irq_reg_stride); if (chip->ack_invert) ret = regmap_write(map, reg, - ~data->status_buf[i]); + ~data->status_buf[i] & data->mask_buf[i]); else ret = regmap_write(map, reg, - data->status_buf[i]); + data->status_buf[i] & ~data->mask_buf[i]); if (chip->clear_ack) { if (chip->ack_invert && !ret) ret = regmap_write(map, reg, - data->status_buf[i]); + data->status_buf[i] & ~data->mask_buf[i]); else if (!ret) ret = regmap_write(map, reg, - ~data->status_buf[i]); + ~data->status_buf[i] & data->mask_buf[i]); } if (ret != 0) dev_err(map->dev, "Failed to ack 0x%x: %d\n", reg, ret); } + data->status_buf[i] &= ~data->mask_buf[i]; } for (i = 0; i < chip->num_irqs; i++) { -- 2.7.4