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From:   Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date:   Wed, 30 Dec 2020 01:11:41 +0100
Message-ID: <CAFBinCDM+bPgwquZAG-H=iMZr4+0rW9CG=WafRys5_HdeBkzjA@mail.gmail.com>
Subject: Re: [PATCH v3 0/5] dwmac-meson8b: picosecond precision RX delay support
To:     Jakub Kicinski <kuba@kernel.org>
Cc:     linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
        netdev@vger.kernel.org, davem@davemloft.net, robh+dt@kernel.org,
        andrew@lunn.ch, f.fainelli@gmail.com, jianxin.pan@amlogic.com,
        Neil Armstrong <narmstrong@baylibre.com>, khilman@baylibre.com,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        jbrunet@baylibre.com
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Hi Jakub,

On Mon, Dec 28, 2020 at 9:37 PM Jakub Kicinski <kuba@kernel.org> wrote:
>
> On Thu, 24 Dec 2020 00:29:00 +0100 Martin Blumenstingl wrote:
> > Hello,
> >
> > with the help of Jianxin Pan (many thanks!) the meaning of the "new"
> > PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs
> > are finally known. These SoCs allow fine-tuning the RGMII RX delay in
> > 200ps steps (contrary to what I have thought in the past [0] these are
> > not some "calibration" values).
>
> Could you repost in a few days? Net-next is still closed:
sure
I also received a Reviewed-by from Florian on patch #1 so I'll also include that


Best regards,
Martin