Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
To:     linux-mips@vger.kernel.org
Cc:     Jiaxun Yang <jiaxun.yang@flygoat.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Serge Semin <Sergey.Semin@baikalelectronics.ru>,
        WANG Xuerui <git@xen0n.name>,
        Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
        Paul Burton <paulburton@kernel.org>,
        =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= 
        <zhouyanjie@wanyeetech.com>, Tiezhu Yang <yangtiezhu@loongson.cn>,
        Paul Cercueil <paul@crapouillou.net>,
        Huacai Chen <chenhc@lemote.com>, YunQiang Su <syq@debian.org>,
        Liangliang Huang <huanglllzu@gmail.com>,
        linux-kernel@vger.kernel.org
Subject: [PATCH 2/3] MIPS: cpu-probe: Vulnerabilities for MIPS cores
Date:   Wed, 30 Dec 2020 11:23:08 +0800
Message-Id: <20201230032314.10042-2-jiaxun.yang@flygoat.com>
In-Reply-To: <20201230032314.10042-1-jiaxun.yang@flygoat.com>
References: <20201230032314.10042-1-jiaxun.yang@flygoat.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Accorading to MIPS's announcement[1], only P5600 and P6600 is
affected by spectre v1 and v2, other cores are not affected.

So we mark vulnerabilities states for MIPS cores as known and
set P5600 and P6600 as vulnerable.

[1]: https://www.mips.com/blog/mips-response-on-speculative-execution-and-side-channel-vulnerabilities/

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/kernel/cpu-probe.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 03adeed58efb..2460783dbdb1 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1688,6 +1688,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 {
 	c->writecombine = _CACHE_UNCACHED_ACCELERATED;
+	c->vulnerabilities |= MIPS_VULNBL_MELTDOWN |
+			      MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2;
+
 	switch (c->processor_id & PRID_IMP_MASK) {
 	case PRID_IMP_QEMU_GENERIC:
 		c->writecombine = _CACHE_UNCACHED;
@@ -1794,10 +1797,12 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 	case PRID_IMP_P5600:
 		c->cputype = CPU_P5600;
 		__cpu_name[cpu] = "MIPS P5600";
+		c->vulnerable |= MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2;
 		break;
 	case PRID_IMP_P6600:
 		c->cputype = CPU_P6600;
 		__cpu_name[cpu] = "MIPS P6600";
+		c->vulnerable |= MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2;
 		break;
 	case PRID_IMP_I6400:
 		c->cputype = CPU_I6400;
-- 
2.30.0