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[23.128.96.18]) by mx.google.com with ESMTP id kt11si29212082ejb.445.2021.01.04.06.44.44; Mon, 04 Jan 2021 06:45:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727231AbhADOnF (ORCPT + 99 others); Mon, 4 Jan 2021 09:43:05 -0500 Received: from foss.arm.com ([217.140.110.172]:37136 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726189AbhADOnD (ORCPT ); Mon, 4 Jan 2021 09:43:03 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 38DBD1FB; Mon, 4 Jan 2021 06:42:17 -0800 (PST) Received: from [10.57.38.245] (unknown [10.57.38.245]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5BC7F3F719; Mon, 4 Jan 2021 06:42:15 -0800 (PST) Subject: Re: [PATCH 06/11] dts: bindings: Document device tree bindings for ETE To: Rob Herring , Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org, Mathieu Poirier , Mike Leach , Linu Cherian , devicetree@vger.kernel.org References: <1608717823-18387-1-git-send-email-anshuman.khandual@arm.com> <1608717823-18387-7-git-send-email-anshuman.khandual@arm.com> <20210103170216.GA4048658@robh.at.kernel.org> From: Suzuki K Poulose Message-ID: <9d19b169-b037-20b1-7c00-b2ba2194addd@arm.com> Date: Mon, 4 Jan 2021 14:42:08 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <20210103170216.GA4048658@robh.at.kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 1/3/21 5:02 PM, Rob Herring wrote: > On Wed, Dec 23, 2020 at 03:33:38PM +0530, Anshuman Khandual wrote: >> From: Suzuki K Poulose >> >> Document the device tree bindings for Embedded Trace Extensions. >> ETE can be connected to legacy coresight components and thus >> could optionally contain a connection graph as described by >> the CoreSight bindings. >> >> Cc: devicetree@vger.kernel.org >> Cc: Mathieu Poirier >> Cc: Mike Leach >> Cc: Rob Herring >> Signed-off-by: Suzuki K Poulose >> Signed-off-by: Anshuman Khandual >> --- >> Documentation/devicetree/bindings/arm/ete.txt | 41 +++++++++++++++++++++++++++ >> 1 file changed, 41 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/ete.txt > > Bindings are in schema format now, please convert this. > Sure, will do that. >> >> diff --git a/Documentation/devicetree/bindings/arm/ete.txt b/Documentation/devicetree/bindings/arm/ete.txt >> new file mode 100644 >> index 0000000..b52b507 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/ete.txt >> @@ -0,0 +1,41 @@ >> +Arm Embedded Trace Extensions >> + >> +Arm Embedded Trace Extensions (ETE) is a per CPU trace component that >> +allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 >> +architecture and has extended support for future architecture changes. >> +The trace generated by the ETE could be stored via legacy CoreSight >> +components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer >> +Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to >> +legacy CoreSight components, a node must be listed per instance, along >> +with any optional connection graph as per the coresight bindings. >> +See bindings/arm/coresight.txt. >> + >> +** ETE Required properties: >> + >> +- compatible : should be one of: >> + "arm,embedded-trace-extensions" >> + >> +- cpu : the CPU phandle this ETE belongs to. > > If this is 1:1 with CPUs, then perhaps it should be a child node of the > CPU nodes. Yes, it is 1:1 with the CPUs. I have tried to keep this aligned with that of "coresight-etm4x". The same driver handles both. The only reason why this was separated from the "coresight.txt" is to describe the new configurations possible (read, TRBE). That said, I am happy to move this under the CPU, if Mathieu is happy with the diversion. Thanks for the review. Suzuki