Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp14071779pxu; Mon, 4 Jan 2021 12:07:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJxzaB4p/pF0aY2DLQPmd4rfiIxCBhAwqHdOvkoMFr0FdRvFvRuIGWC93g0ltRKsQpwx+9Tl X-Received: by 2002:a17:906:4443:: with SMTP id i3mr64674608ejp.133.1609790827919; Mon, 04 Jan 2021 12:07:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609790827; cv=none; d=google.com; s=arc-20160816; b=sVixR2T7RldlraEMd8nYcV6VdaCTHBuRq83iTZ7r0LW1zK+UMKDvQjpf/UeaOkaUbC 8128m52vh+JbNG5ruaAoxZV9U7BO1RQtPvKfXzG84niUunbLt9BmBFtfkN3d2Y1+lncH qewho36e4Ua+H64IqY8UoxPyh9blX59WM2eSgJNdFvy1Pq+tyc56erlvdH/Q6Q34+IZ8 9mbOCm4P02JRA1y7HcOoM81v5y9fQpV65lEKyX1YKpyWLexoGtEhwVK5HddRGobrHgdI DVP/fYEn7x3UuRunYjyDrwzgCWXL9JHaNXapMMkG5FqR7OfwTTeU6YuXswlGazhfpYmy +Pcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=sVxwAiDWSqQXxapE0kahudplSXuQDIswPK1PaJRCCl4=; b=TNnIQUlGE8gi+rAxahh+66FUyDY3mx/fPrEtE3vZQMawHCRn+vHHPoB9y/5J05/T5g yktZ/WhECLGa0su0rvSPa7nEadI/C67ho4LZg0eRvjshslkVr0qgHjHwQnGyheYfUO/k O9wf0EXWo0T2JB4Ud8f05V06nO2EupmxYw1/DrfpvJgOmwYNz1V7PWWzFZyfP9kAkw99 2ynHKFixQT4r1GMMmGJU4K+3Sbxms8h0wQ1mwFn7gWtvJ8v4bTrs0p8rnYHEmdZ87oMt HFBsMqGV0O39bkJqbqvSbYmS6mhsfmn1QsA9xBC5IhQaDYbL0z1MhhP8jtzBnT+i+Paj GnRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id kt2si28596226ejb.124.2021.01.04.12.06.44; Mon, 04 Jan 2021 12:07:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728049AbhADUDu (ORCPT + 99 others); Mon, 4 Jan 2021 15:03:50 -0500 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:46143 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728008AbhADUDu (ORCPT ); Mon, 4 Jan 2021 15:03:50 -0500 X-Originating-IP: 90.112.190.212 Received: from debian.home (lfbn-gre-1-231-212.w90-112.abo.wanadoo.fr [90.112.190.212]) (Authenticated sender: alex@ghiti.fr) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 3703520003; Mon, 4 Jan 2021 20:03:05 +0000 (UTC) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Zong Li , Anup Patel , Christoph Hellwig , Ard Biesheuvel , Arnd Bergmann , linux-efi@vger.kernel.org, linux-arch@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti Subject: [RFC PATCH 04/12] riscv: Allow to dynamically define VA_BITS Date: Mon, 4 Jan 2021 14:58:32 -0500 Message-Id: <20210104195840.1593-5-alex@ghiti.fr> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210104195840.1593-1-alex@ghiti.fr> References: <20210104195840.1593-1-alex@ghiti.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With 4-level page table folding at runtime, we don't know at compile time the size of the virtual address space so we must set VA_BITS dynamically so that sparsemem reserves the right amount of memory for struct pages. Signed-off-by: Alexandre Ghiti --- arch/riscv/Kconfig | 10 ---------- arch/riscv/include/asm/pgtable.h | 11 +++++++++-- arch/riscv/include/asm/sparsemem.h | 6 +++++- 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 44377fd7860e..2979a44103be 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -122,16 +122,6 @@ config ZONE_DMA32 bool default y if 64BIT -config VA_BITS - int - default 32 if 32BIT - default 39 if 64BIT - -config PA_BITS - int - default 34 if 32BIT - default 56 if 64BIT - config PAGE_OFFSET hex default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 102b728ca146..c7973bfd65bc 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -43,8 +43,14 @@ * struct pages to map half the virtual address space. Then * position vmemmap directly below the VMALLOC region. */ +#ifdef CONFIG_64BIT +#define VA_BITS 39 +#else +#define VA_BITS 32 +#endif + #define VMEMMAP_SHIFT \ - (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) + (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) #define VMEMMAP_END (VMALLOC_START - 1) #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) @@ -83,6 +89,7 @@ #endif /* CONFIG_64BIT */ #ifdef CONFIG_MMU + /* Number of entries in the page global directory */ #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) /* Number of entries in the page table */ @@ -453,7 +460,7 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma, * and give the kernel the other (upper) half. */ #ifdef CONFIG_64BIT -#define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE) +#define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE) #else #define KERN_VIRT_START FIXADDR_START #endif diff --git a/arch/riscv/include/asm/sparsemem.h b/arch/riscv/include/asm/sparsemem.h index 45a7018a8118..63acaecc3374 100644 --- a/arch/riscv/include/asm/sparsemem.h +++ b/arch/riscv/include/asm/sparsemem.h @@ -4,7 +4,11 @@ #define _ASM_RISCV_SPARSEMEM_H #ifdef CONFIG_SPARSEMEM -#define MAX_PHYSMEM_BITS CONFIG_PA_BITS +#ifdef CONFIG_64BIT +#define MAX_PHYSMEM_BITS 56 +#else +#define MAX_PHYSMEM_BITS 34 +#endif /* CONFIG_64BIT */ #define SECTION_SIZE_BITS 27 #endif /* CONFIG_SPARSEMEM */ -- 2.20.1