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[23.128.96.18]) by mx.google.com with ESMTP id c24si596898edj.459.2021.01.05.22.06.31; Tue, 05 Jan 2021 22:06:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726398AbhAFGB4 (ORCPT + 99 others); Wed, 6 Jan 2021 01:01:56 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:29790 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725803AbhAFGBg (ORCPT ); Wed, 6 Jan 2021 01:01:36 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 1065sFlt004601; Wed, 6 Jan 2021 13:54:16 +0800 (GMT-8) (envelope-from chiawei_wang@aspeedtech.com) Received: from ChiaWeiWang-PC.aspeed.com (192.168.2.66) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 6 Jan 2021 13:58:50 +0800 From: "Chia-Wei, Wang" To: , , , , , , , , , , CC: Subject: [PATCH 6/6] ARM: dts: aspeed: Add AST2600 eSPI nodes Date: Wed, 6 Jan 2021 13:59:39 +0800 Message-ID: <20210106055939.19386-7-chiawei_wang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210106055939.19386-1-chiawei_wang@aspeedtech.com> References: <20210106055939.19386-1-chiawei_wang@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.2.66] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 1065sFlt004601 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add eSPI nodes for the device tree of Aspeed 6th generation SoCs. Signed-off-by: Chia-Wei, Wang --- arch/arm/boot/dts/aspeed-g6.dtsi | 57 ++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 810b0676ab03..d457baf11e37 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -3,7 +3,9 @@ #include #include +#include #include +#include / { model = "Aspeed BMC"; @@ -75,6 +77,61 @@ interrupts = ; }; + espi: espi@1e6ee000 { + compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon"; + reg = <0x1e6ee000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e6ee000 0x1000>; + + espi_ic: espi-ic { + #interrupt-cells = <1>; + compatible = "aspeed,ast2600-espi-ic"; + interrupts-extended = <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <&gpio0 ASPEED_GPIO(W, 7) IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + status = "disabled"; + }; + + espi_ctrl: espi-ctrl { + compatible = "aspeed,ast2600-espi-ctrl"; + interrupts-extended = <&espi_ic ASPEED_ESPI_IC_CTRL_EVENT>, + <&espi_ic ASPEED_ESPI_IC_CTRL_RESET>; + clocks = <&syscon ASPEED_CLK_GATE_ESPICLK>; + resets = <&syscon ASPEED_RESET_ESPI>; + status = "disabled"; + }; + + espi_peripheral: espi-peripheral-channel { + compatible = "aspeed,ast2600-espi-peripheral"; + interrupts-extended = <&espi_ic ASPEED_ESPI_IC_PERIF_EVENT>, + <&espi_ic ASPEED_ESPI_IC_CHAN_RESET>; + status = "disabled"; + }; + + espi_vw: espi-vw-channel { + compatible = "aspeed,ast2600-espi-vw"; + interrupts-extended = <&espi_ic ASPEED_ESPI_IC_VW_EVENT>, + <&espi_ic ASPEED_ESPI_IC_CHAN_RESET>; + status = "disabled"; + }; + + espi_oob: espi-oob-channel { + compatible = "aspeed,ast2600-espi-oob"; + interrupts-extended = <&espi_ic ASPEED_ESPI_IC_OOB_EVENT>, + <&espi_ic ASPEED_ESPI_IC_CHAN_RESET>; + status = "disabled"; + }; + + espi_flash: espi-flash-channel { + compatible = "aspeed,ast2600-espi-flash"; + interrupts-extended = <&espi_ic ASPEED_ESPI_IC_FLASH_EVENT>, + <&espi_ic ASPEED_ESPI_IC_CHAN_RESET>; + status = "disabled"; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; -- 2.17.1