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Peter Anvin" , David Woodhouse , Joerg Roedel , Bjorn Helgaas , "Gustavo A. R. Silva" , Jon Derrick Subject: [PATCH v4 16/17] x86/ioapic: export a few functions and data structures via io_apic.h Date: Wed, 6 Jan 2021 20:33:49 +0000 Message-Id: <20210106203350.14568-17-wei.liu@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210106203350.14568-1-wei.liu@kernel.org> References: <20210106203350.14568-1-wei.liu@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We are about to implement an irqchip for IO-APIC when Linux runs as root on Microsoft Hypervisor. At the same time we would like to reuse existing code as much as possible. Move mp_chip_data to io_apic.h and make a few helper functions non-static. No functional change. Signed-off-by: Wei Liu --- arch/x86/include/asm/io_apic.h | 22 ++++++++++++++++++++++ arch/x86/kernel/apic/io_apic.c | 25 ++++++++----------------- 2 files changed, 30 insertions(+), 17 deletions(-) diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 437aa8d00e53..8e2b78a0edbd 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h @@ -87,6 +87,15 @@ struct IO_APIC_route_entry { }; } __attribute__ ((packed)); +struct mp_chip_data { + struct list_head irq_2_pin; + struct IO_APIC_route_entry entry; + bool is_level; + bool active_low; + bool isa_irq; + u32 count; +}; + struct irq_alloc_info; struct ioapic_domain_cfg; @@ -174,6 +183,19 @@ extern void clear_IO_APIC(void); extern void restore_boot_irq_mode(void); extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin); extern void print_IO_APICs(void); + +struct irq_data; +extern struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin); +extern void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e); +extern void mask_ioapic_irq(struct irq_data *irq_data); +extern void unmask_ioapic_irq(struct irq_data *irq_data); +extern int ioapic_set_affinity(struct irq_data *irq_data, const struct cpumask *mask, bool force); +extern struct irq_domain *mp_ioapic_irqdomain(int ioapic); +enum irqchip_irq_state; +extern int ioapic_irq_get_chip_state(struct irq_data *irqd, + enum irqchip_irq_state which, + bool *state); + #else /* !CONFIG_X86_IO_APIC */ #define IO_APIC_IRQ(x) 0 diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index e4ab4804b20d..05cc91d3d607 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -88,15 +88,6 @@ struct irq_pin_list { int apic, pin; }; -struct mp_chip_data { - struct list_head irq_2_pin; - struct IO_APIC_route_entry entry; - bool is_level; - bool active_low; - bool isa_irq; - u32 count; -}; - struct mp_ioapic_gsi { u32 gsi_base; u32 gsi_end; @@ -154,7 +145,7 @@ static inline bool mp_is_legacy_irq(int irq) return irq >= 0 && irq < nr_legacy_irqs(); } -static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic) +struct irq_domain *mp_ioapic_irqdomain(int ioapic) { return ioapics[ioapic].irqdomain; } @@ -296,7 +287,7 @@ static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin) return entry; } -static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) +struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) { struct IO_APIC_route_entry entry; unsigned long flags; @@ -320,7 +311,7 @@ static void __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e io_apic_write(apic, 0x10 + 2*pin, e.w1); } -static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) +void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) { unsigned long flags; @@ -440,7 +431,7 @@ static void io_apic_sync(struct irq_pin_list *entry) readl(&io_apic->data); } -static void mask_ioapic_irq(struct irq_data *irq_data) +void mask_ioapic_irq(struct irq_data *irq_data) { struct mp_chip_data *data = irq_data->chip_data; unsigned long flags; @@ -455,7 +446,7 @@ static void __unmask_ioapic(struct mp_chip_data *data) io_apic_modify_irq(data, false, NULL); } -static void unmask_ioapic_irq(struct irq_data *irq_data) +void unmask_ioapic_irq(struct irq_data *irq_data) { struct mp_chip_data *data = irq_data->chip_data; unsigned long flags; @@ -1906,8 +1897,8 @@ static void ioapic_configure_entry(struct irq_data *irqd) __ioapic_write_entry(entry->apic, entry->pin, mpd->entry); } -static int ioapic_set_affinity(struct irq_data *irq_data, - const struct cpumask *mask, bool force) +int ioapic_set_affinity(struct irq_data *irq_data, + const struct cpumask *mask, bool force) { struct irq_data *parent = irq_data->parent_data; unsigned long flags; @@ -1936,7 +1927,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data, * * Verify that the corresponding Remote-IRR bits are clear. */ -static int ioapic_irq_get_chip_state(struct irq_data *irqd, +int ioapic_irq_get_chip_state(struct irq_data *irqd, enum irqchip_irq_state which, bool *state) { -- 2.20.1