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[109.252.192.57]) by smtp.googlemail.com with ESMTPSA id q21sm1369032lff.280.2021.01.07.11.39.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 Jan 2021 11:39:09 -0800 (PST) Subject: Re: [PATCH v2 00/48] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs To: Krzysztof Kozlowski Cc: Thierry Reding , Jonathan Hunter , Mark Brown , Liam Girdwood , Ulf Hansson , Mauro Carvalho Chehab , Rob Herring , Peter Geis , Nicolas Chauvet , "Rafael J. Wysocki" , Kevin Hilman , Peter De Schrijver , Viresh Kumar , Stephen Boyd , Michael Turquette , devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org References: <20201217180638.22748-1-digetx@gmail.com> <20210105171111.GC26301@kozik-lap> From: Dmitry Osipenko Message-ID: <988cf951-ff81-4b48-6baf-b393bd1613d2@gmail.com> Date: Thu, 7 Jan 2021 22:39:09 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.2 MIME-Version: 1.0 In-Reply-To: <20210105171111.GC26301@kozik-lap> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 05.01.2021 20:11, Krzysztof Kozlowski пишет: > On Thu, Dec 17, 2020 at 09:05:50PM +0300, Dmitry Osipenko wrote: >> Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs, which reduces >> power consumption and heating of the Tegra chips. Tegra SoC has multiple >> hardware units which belong to a core power domain of the SoC and share >> the core voltage. The voltage must be selected in accordance to a minimum >> requirement of every core hardware unit. >> >> The minimum core voltage requirement depends on: >> >> 1. Clock enable state of a hardware unit. >> 2. Clock frequency. >> 3. Unit's internal idling/active state. >> >> This series is tested on Acer A500 (T20), AC100 (T20), Nexus 7 (T30), >> Ouya (T30), TK1 (T124) and some others. I also added voltage scaling to >> the Ventana (T20) and Cardhu (T30) boards which are tested by NVIDIA's CI >> farm. Tegra30 is now couple degrees cooler on Nexus 7 and stays cool on >> Ouya (instead of becoming burning hot) while system is idling. It should >> be possible to improve this further by implementing a more advanced power >> management features for the kernel drivers. >> >> The DVFS support is opt-in for all boards, meaning that older DTBs will >> continue to work like they did it before this series. It should be possible >> to easily add the core voltage scaling support for Tegra114+ SoCs based on >> this grounding work later on, if anyone will want to implement it. > > The same comment as for your interconnect work: for sets touching > multiple systems please mention the dependencies between patches in the > cover letter. Not as a reply to such remark like I make here, but as a > separate entry in the cover letter. I'll describe all the dependencies in the next revision, thanks.