Received: by 2002:a05:6a10:f347:0:0:0:0 with SMTP id d7csp655382pxu; Thu, 7 Jan 2021 14:50:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJx7zJIuvlRgPhYwEYf1hQkNe68+KaxI2I/wJqLvjnTRs8pFlMKdNcguYU3qbP6WtmVmcst7 X-Received: by 2002:a17:906:b793:: with SMTP id dt19mr767336ejb.120.1610059847876; Thu, 07 Jan 2021 14:50:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610059847; cv=none; d=google.com; s=arc-20160816; b=M8y/LVQSmfg4BK55t8Yqumjr2QKRcxU4SIaA9hqInWDSY956MuHwTmi5J8E7CUOSrc qHSPmTZfVyIbi69y8nxfgoOdmANdKCZEWLxbLD0weZotKkn0ejGYAtPTUcGRQfUUKjSK rY5/DEsESG6YvwyLpDaQZJ9lD6+McZNJSG8QY3btfy/fibqKlTO0r7aTcfNwhw+l/XJu JXilS/palhpIFC4nCsjiTH9yt2ITSwUBNliMdwh18UQVUhajlxaXrGImhbuFeGI2hv9l WsvRqPKDWcVfjj2zQ+BAX6YjWteA7VGOoO74Iqpyf5Zdp7bgxvGOxOYKol+HDWHxAIxU FshA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=UBbspZi0InzCAWqAKuWUmxiQ/lqXZTt+DFXtkh8nSVk=; b=Y2waMBS0fpXrElfZzfGLnlkzN1Y5Hqx1UGrUoHpBJgndg+bZgaUu94qhOA+fm9aadu WBlWu5DjGw3i6TgWCpx+CtxDiW9j4WmOIR8Dcsx1iJvnXNm+saLXY2pynPgxbpI1Bg0r 6tUEHta4qtGlvRFhyc2hy0qBx5+fiHpMYNq+WPspVhDTZQ0UaT00/eCrg8VD4cSqOKQg OETaT1m1d8dtKc/4Gmo9+N+Dh0ZSFgUx1odtdKHDvEeO5qQwmRMFp99pk58iYVj9i3gE QeDeqI1+ao5DZyu3IeSOTdhwFroouHsxXkMpEyCV8nxLC+7IoaT1Y2eaWFn4pmU9qvmx 0a4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kresin-me.20150623.gappssmtp.com header.s=20150623 header.b=ohx3twNX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k25si2748571ejz.91.2021.01.07.14.50.24; Thu, 07 Jan 2021 14:50:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kresin-me.20150623.gappssmtp.com header.s=20150623 header.b=ohx3twNX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727913AbhAGWtu (ORCPT + 99 others); Thu, 7 Jan 2021 17:49:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727722AbhAGWtu (ORCPT ); Thu, 7 Jan 2021 17:49:50 -0500 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DC6BC0612F6 for ; Thu, 7 Jan 2021 14:49:09 -0800 (PST) Received: by mail-wm1-x329.google.com with SMTP id r4so6839630wmh.5 for ; Thu, 07 Jan 2021 14:49:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kresin-me.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UBbspZi0InzCAWqAKuWUmxiQ/lqXZTt+DFXtkh8nSVk=; b=ohx3twNXChMl+YcJFXiovLick++1jveuCJflQo9dGZq9DzXQePIsVtIsLhwwnNtU04 +mbA6iQmcjKayfYjb1jNYGllsGdfbfWihoGVuRByySMuRiTLNrSllOZX5kPQc3vS36e3 VBXm9CxFnAqC89HrsAiRXeekX4UvsQe6miq2Yq/W49ZArkoZANaNIZu2YYVMaVNa/Fy8 z/pSaQcQeIQ67kF6EBsTJ7esIwdaoEw7ICw3CacZfNaqHMYrkmJEMKIJlIABsLNrNXFC d79NW1jVjIGT4QpP0QTE5XM68boiTcfIy2nOkBK4AJzLmXKLOVt9l3ADrqq+urocaFuK B1lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UBbspZi0InzCAWqAKuWUmxiQ/lqXZTt+DFXtkh8nSVk=; b=Dwmp6sIEuHin0lOW1KMYRlKZcRUTZF9KSTgiOhresnfPJOTOdHPP+d2kX2qVH3A7gB feivDxzAWX0sdDsoHMzhXRBCIAAfvEXlH71qKXxv7di7Lh3JOtHdtKMFEj6FvBvnfQN5 3Px2hlA0o5gtqmKxzUVh9y1qseZNtULJKA18zGRBNBaHjn/gt9c/SzYyQI7t3zl5SpxP d2BwDhVxczU3wVXb5ze4qabHyh9L5bHitGUOYbXnfQgOp+fDSLjc6gZzWGDaGGPuqFCP 6KeSEnsJ3SPp1zzlu9zHN+g2fW3uKquFEGfRt6EYHyHj+WsHYuox3IaN0LLCU4J3g2K0 hu7w== X-Gm-Message-State: AOAM533Glpc+qPOnf9Ql83Q2HGaupbRZV45r3C3t8MUIgHl6MDl9Gd9P ZBoD+j+mTmXfbVLZpD6wt9qBqA== X-Received: by 2002:a05:600c:1483:: with SMTP id c3mr553547wmh.87.1610059748145; Thu, 07 Jan 2021 14:49:08 -0800 (PST) Received: from desktop.wvd.kresin.me (p200300ec2f1543005c3547d24e99751a.dip0.t-ipconnect.de. [2003:ec:2f15:4300:5c35:47d2:4e99:751a]) by smtp.gmail.com with ESMTPSA id u10sm9392800wmd.43.2021.01.07.14.49.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 14:49:07 -0800 (PST) From: Mathias Kresin To: Kishon Vijay Abraham I , Vinod Koul , Philipp Zabel , linux-kernel@vger.kernel.org Cc: Martin Blumenstingl , Hauke Mehrtens , stable@vger.kernel.org Subject: [PATCH] phy: lantiq: rcu-usb2: wait after clock enable Date: Thu, 7 Jan 2021 23:49:01 +0100 Message-Id: <20210107224901.2102479-1-dev@kresin.me> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit 65dc2e725286 ("usb: dwc2: Update Core Reset programming flow.") revealed that the phy isn't ready immediately after enabling it's clocks. The dwc2_check_core_version() fails and the dwc2 usb driver errors out. Add a short delay to let the phy get up and running. There isn't any documentation how much time is required, the value was chosen based on tests. Cc: # v5.7+ Signed-off-by: Mathias Kresin --- drivers/phy/lantiq/phy-lantiq-rcu-usb2.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c index a7d126192cf1..29d246ea24b4 100644 --- a/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c +++ b/drivers/phy/lantiq/phy-lantiq-rcu-usb2.c @@ -124,8 +124,16 @@ static int ltq_rcu_usb2_phy_power_on(struct phy *phy) reset_control_deassert(priv->phy_reset); ret = clk_prepare_enable(priv->phy_gate_clk); - if (ret) + if (ret) { dev_err(dev, "failed to enable PHY gate\n"); + return ret; + } + + /* + * at least the xrx200 usb2 phy requires some extra time to be + * operational after enabling the clock + */ + usleep_range(100, 200); return ret; } -- 2.25.1