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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id b26sm7307722pgm.25.2021.01.07.17.02.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 17:02:39 -0800 (PST) Date: Thu, 7 Jan 2021 18:02:38 -0700 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, leo.yan@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, Jonathan Zhou , Catalin Marinas , Will Deacon Subject: Re: [PATCH v6 26/26] coresight: Add support for v8.4 SelfHosted tracing Message-ID: <20210108010238.GI43045@xps15> References: <20210107123859.674252-1-suzuki.poulose@arm.com> <20210107123859.674252-27-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210107123859.674252-27-suzuki.poulose@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 07, 2021 at 12:38:59PM +0000, Suzuki K Poulose wrote: > From: Jonathan Zhou > > v8.4 tracing extensions added support for trace filtering controlled > by TRFCR_ELx. This must be programmed to allow tracing at EL1/EL2 and > EL0. The timestamp used is the virtual time. Also enable CONTEXIDR_EL2 > tracing if we are running the kernel at EL2. > > Cc: Catalin Marinas > Cc: Mathieu Poirier > Cc: Mike Leach > Cc: Will Deacon > Signed-off-by: Jonathan Zhou > [ Move the trace filtering setup etm_init_arch_data() and > clean ups] > Signed-off-by: Suzuki K Poulose Reviewed-by: Mathieu Poirier > --- > .../coresight/coresight-etm4x-core.c | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index 34a6cdff75e7..6d96f4226bca 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -859,6 +859,30 @@ static bool etm4_init_csdev_access(struct etmv4_drvdata *drvdata, > return false; > } > > +static void cpu_enable_tracing(void) > +{ > + u64 dfr0 = read_sysreg(id_aa64dfr0_el1); > + u64 trfcr; > + > + if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_TRACE_FILT_SHIFT)) > + return; > + > + /* > + * If the CPU supports v8.4 SelfHosted Tracing, enable > + * tracing at the kernel EL and EL0, forcing to use the > + * virtual time as the timestamp. > + */ > + trfcr = (TRFCR_ELx_TS_VIRTUAL | > + TRFCR_ELx_ExTRE | > + TRFCR_ELx_E0TRE); > + > + /* If we are running at EL2, allow tracing the CONTEXTIDR_EL2. */ > + if (is_kernel_in_hyp_mode()) > + trfcr |= TRFCR_EL2_CX; > + > + write_sysreg_s(trfcr, SYS_TRFCR_EL1); > +} > + > static void etm4_init_arch_data(void *info) > { > u32 etmidr0; > @@ -1044,6 +1068,7 @@ static void etm4_init_arch_data(void *info) > /* NUMCNTR, bits[30:28] number of counters available for tracing */ > drvdata->nr_cntr = BMVAL(etmidr5, 28, 30); > etm4_cs_lock(drvdata, csa); > + cpu_enable_tracing(); > } > > static inline u32 etm4_get_victlr_access_type(struct etmv4_config *config) > -- > 2.24.1 >