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Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
To:     Peter Rosin <peda@axentia.se>, Vinod Koul <vkoul@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, Nishanth Menon <nm@ti.com>,
        Swapnil Jakhade <sjakhade@cadence.com>
CC:     <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>
References: <20201224114250.1083-1-kishon@ti.com>
 <20201224114250.1083-5-kishon@ti.com>
 <cb53a07e-98ed-71df-7e0c-acd78484ab6e@axentia.se>
From:   Kishon Vijay Abraham I <kishon@ti.com>
Message-ID: <c5644863-cff5-6516-d7d1-42603fe1d0e3@ti.com>
Date:   Fri, 8 Jan 2021 16:33:34 +0530
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Hi Peter,

On 08/01/21 4:16 pm, Peter Rosin wrote:
> Hi!
> 
> On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  include/dt-bindings/mux/ti-serdes.h | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
>> index 9047ec6bd3cf..68e0f76deed1 100644
>> --- a/include/dt-bindings/mux/ti-serdes.h
>> +++ b/include/dt-bindings/mux/ti-serdes.h
>> @@ -90,4 +90,8 @@
>>  #define J7200_SERDES0_LANE3_USB			0x2
>>  #define J7200_SERDES0_LANE3_IP4_UNUSED		0x3
>>  
>> +/* AM64 */
> 
> In case you end up keeping these defines, despite the comment by Rob...
> 
> Nitpick, the J721E and J7200 sections have a blank line here, between the
> header comment and the actual defines. But mehh...
> 
> Acked-by: Peter Rosin <peda@axentia.se>
Sure, will fix it in the next revision.

Thanks
Kishon

> 
> Cheers,
> Peter
> 
>> +#define AM64_SERDES0_LANE0_PCIE0		0x0
>> +#define AM64_SERDES0_LANE0_USB			0x1
>> +
>>  #endif /* _DT_BINDINGS_MUX_TI_SERDES */
>>