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Fri, 08 Jan 2021 13:14:56 -0800 (PST) MIME-Version: 1.0 References: <20210108201457.3078600-1-lee.jones@linaro.org> <20210108201457.3078600-27-lee.jones@linaro.org> In-Reply-To: <20210108201457.3078600-27-lee.jones@linaro.org> From: Alex Deucher Date: Fri, 8 Jan 2021 16:14:45 -0500 Message-ID: Subject: Re: [PATCH 26/40] drm/amd/display/dc/dce/dce_clock_source: Fix formatting/spelling of worthy function headers To: Lee Jones Cc: Leo Li , Bhawanpreet Lakha , LKML , amd-gfx list , David Airlie , Maling list - DRI developers , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 8, 2021 at 3:15 PM Lee Jones wrote: > > Demote the one that provides no param descriptions. > > Fixes the following W=3D1 kernel build warning(s): > > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'calc_pll_cs' not described in 'calculat= e_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'target_pix_clk_100hz' not described in = 'calculate_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'ref_divider' not described in 'calculat= e_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'post_divider' not described in 'calcula= te_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'feedback_divider_param' not described i= n 'calculate_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:142: war= ning: Function parameter or member 'fract_feedback_divider_param' not descr= ibed in 'calculate_fb_and_fractional_fb_divider' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:200: war= ning: Function parameter or member 'calc_pll_cs' not described in 'calc_fb_= divider_checking_tolerance' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:200: war= ning: Function parameter or member 'pll_settings' not described in 'calc_fb= _divider_checking_tolerance' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:200: war= ning: Function parameter or member 'ref_divider' not described in 'calc_fb_= divider_checking_tolerance' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:200: war= ning: Function parameter or member 'post_divider' not described in 'calc_fb= _divider_checking_tolerance' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:200: war= ning: Function parameter or member 'tolerance' not described in 'calc_fb_di= vider_checking_tolerance' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:478: war= ning: Function parameter or member 'clk_src' not described in 'dce110_get_p= ix_clk_dividers_helper' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:478: war= ning: Function parameter or member 'pll_settings' not described in 'dce110_= get_pix_clk_dividers_helper' > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:478: war= ning: Function parameter or member 'pix_clk_params' not described in 'dce11= 0_get_pix_clk_dividers_helper' > > Cc: Harry Wentland > Cc: Leo Li > Cc: Alex Deucher > Cc: "Christian K=C3=B6nig" > Cc: David Airlie > Cc: Daniel Vetter > Cc: Bhawanpreet Lakha > Cc: amd-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Lee Jones Applied. Thanks! Alex > --- > .../drm/amd/display/dc/dce/dce_clock_source.c | 57 +++++++++---------- > 1 file changed, 28 insertions(+), 29 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/driv= ers/gpu/drm/amd/display/dc/dce/dce_clock_source.c > index fb733f573715e..10938a8c9500a 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c > +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c > @@ -113,20 +113,19 @@ static const struct spread_spectrum_data *get_ss_da= ta_entry( > } > > /** > - * Function: calculate_fb_and_fractional_fb_divider > + * calculate_fb_and_fractional_fb_divider - Calculates feedback and frac= tional > + * feedback dividers values > * > - * * DESCRIPTION: Calculates feedback and fractional feedback dividers v= alues > + * @calc_pll_cs: Pointer to clock source information > + * @target_pix_clk_100hz: Desired frequency in 100 Hz > + * @ref_divider: Reference divider (already known) > + * @post_divider: Post Divider (already known) > + * @feedback_divider_param: Pointer where to store > + * calculated feedback divider value > + * @fract_feedback_divider_param: Pointer where to store > + * calculated fract feedback divider value > * > - *PARAMETERS: > - * targetPixelClock Desired frequency in 100 Hz > - * ref_divider Reference divider (already known) > - * postDivider Post Divider (already known) > - * feedback_divider_param Pointer where to store > - * calculated feedback divider value > - * fract_feedback_divider_param Pointer where to store > - * calculated fract feedback divider= value > - * > - *RETURNS: > + * return: > * It fills the locations pointed by feedback_divider_param > * and fract_feedback_divider_param > * It returns - true if feedback divider not 0 > @@ -175,22 +174,22 @@ static bool calculate_fb_and_fractional_fb_divider( > } > > /** > -*calc_fb_divider_checking_tolerance > -* > -*DESCRIPTION: Calculates Feedback and Fractional Feedback divider values > -* for passed Reference and Post divider, checking for toler= ance. > -*PARAMETERS: > -* pll_settings Pointer to structure > -* ref_divider Reference divider (already known) > -* postDivider Post Divider (already known) > -* tolerance Tolerance for Calculated Pixel Clock to be within > -* > -*RETURNS: > -* It fills the PLLSettings structure with PLL Dividers values > -* if calculated values are within required tolerance > -* It returns - true if error is within tolerance > -* - false if error is not within tolerance > -*/ > + * calc_fb_divider_checking_tolerance - Calculates Feedback and > + * Fractional Feedback divider valu= es > + * for passed Reference and Post div= ider, > + * checking for tolerance. > + * @calc_pll_cs: Pointer to clock source information > + * @pll_settings: Pointer to PLL settings > + * @ref_divider: Reference divider (already known) > + * @post_divider: Post Divider (already known) > + * @tolerance: Tolerance for Calculated Pixel Clock to be within > + * > + * return: > + * It fills the PLLSettings structure with PLL Dividers values > + * if calculated values are within required tolerance > + * It returns - true if error is within tolerance > + * - false if error is not within tolerance > + */ > static bool calc_fb_divider_checking_tolerance( > struct calc_pll_clock_source *calc_pll_cs, > struct pll_settings *pll_settings, > @@ -460,7 +459,7 @@ static bool pll_adjust_pix_clk( > return false; > } > > -/** > +/* > * Calculate PLL Dividers for given Clock Value. > * First will call VBIOS Adjust Exec table to check if requested Pixel c= lock > * will be Adjusted based on usage. > -- > 2.25.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel