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[23.128.96.18]) by mx.google.com with ESMTP id hd15si3684486ejc.745.2021.01.08.17.24.44; Fri, 08 Jan 2021 17:25:07 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qSdoP74J; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726618AbhAIBXB (ORCPT + 99 others); Fri, 8 Jan 2021 20:23:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726402AbhAIBXA (ORCPT ); Fri, 8 Jan 2021 20:23:00 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62675C061757 for ; Fri, 8 Jan 2021 17:22:20 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id b26so27308860lff.9 for ; Fri, 08 Jan 2021 17:22:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=P7K4KwoyoMC1EHC74ArNpJ8GH0eAGxVDT4lx8rL5k2k=; b=qSdoP74JG7n1KT2X+r7FEOV1BJ9c8yNMdLxzu4ZCkkBzR8AuRy8mRFp7kZNr4bBYQN yxecIqCmOcgPpVGJcMxl70RZS517tOJnV07kvDb8X9gJQyvqYwifsJORHcfgaPDdjLoI pXLj8xo88O6+uO36AgfaQf+LahG81TvRjcAuSg/6/GEj8C5i5oy2r297z3dxJae0vjf2 hUVRnmhCgmRc9eTbpq3X+yZ6wYSz+xjSqA6BFpd+TX5G7REXISpppVY0kiZ37aNEO3Ve i+Z+/uVoPSWkYvIk7lt9npNBgG9Bioc+5m4carm+Fctpsxu4SSWMDlesZ2svxlZWX5eF 4kdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=P7K4KwoyoMC1EHC74ArNpJ8GH0eAGxVDT4lx8rL5k2k=; b=CBTDQyD3XHo3kS8wRkJscCVwppGJpkR11pxP2+d8bf7knzDd4UrzmDldqfUHw8e7rt NhlbJ7eF+LMpybVt+SKf58AIhJdNR3K+dQBGrjohVZc1wRQFBGX6PfxIfrEYluw5zDXQ V83PxkUIacpy70WC+qj4Wv8+wFfOMph9BMm/bDQSM+IbnLZid6KWT0wIA+ciYKiupCGu 5zIObWbbjzYOSrrOSgl1ZdsivzV81puWKzvlqAifcUE3/6mQtY9BSGIdWSIKXpZ+Xh4h +SKExO1AV2s0vNJeMR8ucIUxgc+uQrIzPYca9ku7lzp6BgaoEiDzIyyYDsSP+uvE7Y6J ZTQw== X-Gm-Message-State: AOAM532aeZ0mc6wMm02cguBSIDQuFzqcWN1OnvZsLCO8nGwMHQOQoUmx fxhYXrNoyzbLwtqjuqTswLXaXdVnxbwgHXmW0Ns+jg== X-Received: by 2002:a05:651c:205b:: with SMTP id t27mr2729651ljo.368.1610155338714; Fri, 08 Jan 2021 17:22:18 -0800 (PST) MIME-Version: 1.0 References: <20201218045134.4158709-1-drew@beagleboard.org> <20201224203603.GA59600@x1> In-Reply-To: <20201224203603.GA59600@x1> From: Linus Walleij Date: Sat, 9 Jan 2021 02:22:07 +0100 Message-ID: Subject: Re: [RFC PATCH v2] pinctrl: add helper to expose pinctrl state in debugfs To: Drew Fustini Cc: Andy Shevchenko , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , Pantelis Antoniou , Pantelis Antoniou , Pantelis Antoniou , Jason Kridner , Robert Nelson , Tony Lindgren Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Drew, sorry for belated review. The approach is so uncommon so it had me confused. On Thu, Dec 24, 2020 at 9:36 PM Drew Fustini wrote: > > > I used the compatible string "pinctrl,state-helper" but would appreciate > > > advice on how to best name this. Should I create a new vendor prefix? > > > > Here is the first concern. Why does this require to be a driver with a > > compatible string? > > I have not been able to figure out how to have different active pinctrl > states for each header pins (for example P2 header pin 3) unless they > are represented as DT nodes with their own compatible for this helper > driver such as: > > &ocp { > P2_03_pinmux { > compatible = "pinctrl,state-helper"; > pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm"; > pinctrl-0 = <&P2_03_default_pin>; > pinctrl-1 = <&P2_03_gpio_pin>; > pinctrl-2 = <&P2_03_gpio_pu_pin>; > pinctrl-3 = <&P2_03_gpio_pd_pin>; > pinctrl-4 = <&P2_03_gpio_input_pin>; > pinctrl-5 = <&P2_03_pwm_pin>; > }; > } I do not think the DT people are going to appreciate this pseudo-device. Can you not just represent them as pin control hogs and have the debugfs code with the other debugfs code in drivers/pinctrl/core.c? Normal drivers cannot play around with the state assigned to a hog, but debugfs can certainly do that so go ahead and patch the core. > I can assign pinctrl states in the pin controller DT node which has > compatible pinctrl-single (line 301 arch/arm/boot/dts/am33xx-l4.dtsi): > > &am33xx_pinmux { > > pinctrl-names = "default", "gpio", "pwm"; > pinctrl-0 = < &P2_03_default_pin &P1_34_default_pin &P2_19_default_pin &P2_24_default_pin > &P2_33_default_pin &P2_22_default_pin &P2_18_default_pin &P2_10_default_pin > &P2_06_default_pin &P2_04_default_pin &P2_02_default_pin &P2_08_default_pin > &P2_17_default_pin >; > pinctrl-1 = < &P2_03_gpio_pin &P1_34_gpio_pin &P2_19_gpio_pin &P2_24_gpio_pin > &P2_33_gpio_pin &P2_22_gpio_pin &P2_18_gpio_pin &P2_10_gpio_pin > &P2_06_gpio_pin &P2_04_gpio_pin &P2_02_gpio_pin &P2_08_gpio_pin > &P2_17_gpio_pin >; > pinctrl-2 = < &P2_03_pwm &P1_34_pwm &P2_19_pwm &P2_24_pwm > &P2_33_pwm &P2_22_pwm &P2_18_pwm &P2_10_pwm > &P2_06_pwm &P2_04_pwm &P2_02_pwm &P2_08_pwm > &P2_17_pwm >; > > } > > However, there is no way to later select "gpio" for P2.03 and select > "pwm" for P1.34 at the same time. Thus, I can not figure out a way to > select independent states per pin unless I make a node for each pin that > binds to a helper driver. > > It feels like there may be a simpler soluation but I can't see to figure > it out. Suggestions welcome! I think maybe there is no solution because you are solving a problem that only pinctrl-single while trying to stay generic? The single driver is special in that it requires all states of pins to be encoded into the device tree, but for debugging that is kind of unfriendly which was mentioned in its inception. For deep debugging it is good to let the core know of all available functions and groups and single does not IIUC. Yours, Linus Walleij