Received: by 2002:a05:6a10:2785:0:0:0:0 with SMTP id ia5csp1879163pxb; Sun, 10 Jan 2021 14:53:10 -0800 (PST) X-Google-Smtp-Source: ABdhPJz3QbPRIx9jogDmjdTOemZK/JznpRFMkBEzdqRt35yPvOuNblXsfGRufXjvwTFmFmY6abDC X-Received: by 2002:a17:906:e247:: with SMTP id gq7mr9427390ejb.27.1610319190374; Sun, 10 Jan 2021 14:53:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610319190; cv=none; d=google.com; s=arc-20160816; b=kEd18xOb3YaF+2MMhhGQdcPBwJ9HPtfqVFsIoaqahJ6u1Hnx1YsNUUViSkQTQclOm5 Ax04uaiVe3JBUQ49lVQaXd/JbhwYzylFNNW2pPSmunA3tvH4ecIP8yBztydaxuhYOe1I VoYP/Pjx7fL61iUW5ddCo/xRwezeIj43y8lZMJ4CyQwR110BJoP3QPZzENsoMil0D9b+ 6PbU1X+KZzeoTJFFAORRuu3AKcPfXYqExnKoZ81JXn8ugcUAj8uf1BiuD7j7zItHtv2x 5AvAqyNlSsPL7c9e/gmMHUc+uVb+NVYvOnIKGaZ4uIwELkJUyCJ/HWzZUJktClXoOdR5 W++A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=10D+SAVLlLNmIvin8P6JgzglmvI6arYuFEYBmkIY+Fk=; b=dR0DaeyIGIPo7DMRlgteID89npg2Miv5C52lv5eBt0/MsZjv8/sQ6FYCuDzsVqoKYP k002ewEdiY69am84ICxtUfKbv4HG5P1ezAL58MCXsRyl1OnRR8GuCYlyVP6pqaw6BQcI LdZyqCdpw4YD1yLYjnl4AqNiYcf8L+FVdvbtx05cfZRbli8nn7Rn6WzXTgylF21lWP7V iWQGnBSyH0r8LnBaB3jzK5C6cey/LGLydFNPrDfbffDS0Er3BvSyGKeR2WoD8SLLTZCN tmtXQvN0FJCsYYxfh3vitwlr583KHDMRwGC011vpmTjryDgG9NK46xLWKlUuNu6iv2T/ 1KWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cz3si5879689edb.467.2021.01.10.14.52.47; Sun, 10 Jan 2021 14:53:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726697AbhAJWus (ORCPT + 99 others); Sun, 10 Jan 2021 17:50:48 -0500 Received: from foss.arm.com ([217.140.110.172]:39086 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727169AbhAJWuk (ORCPT ); Sun, 10 Jan 2021 17:50:40 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 467C61480; Sun, 10 Jan 2021 14:49:24 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EBA573F719; Sun, 10 Jan 2021 14:49:22 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: coresight@lists.linaro.org, mathieu.poirier@linaro.org, anshuman.khandual@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, linux-kernel@vger.kernel.org, jonathan.zhouwen@huawei.com, catalin.marinas@arm.com, Suzuki K Poulose Subject: [PATCH v7 14/28] coresight: etm4x: Check for Software Lock Date: Sun, 10 Jan 2021 22:48:36 +0000 Message-Id: <20210110224850.1880240-15-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210110224850.1880240-1-suzuki.poulose@arm.com> References: <20210110224850.1880240-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Software lock is not implemented for system instructions based accesses. So, skip the lock register access in such cases. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- Change since v6: - Fixed indentation --- .../coresight/coresight-etm4x-core.c | 40 ++++++++++++------- 1 file changed, 26 insertions(+), 14 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 043cd52a6fae..feea52938a7b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -133,6 +133,21 @@ static void etm4_os_lock(struct etmv4_drvdata *drvdata) isb(); } +static void etm4_cs_lock(struct etmv4_drvdata *drvdata, + struct csdev_access *csa) +{ + /* Software Lock is only accessible via memory mapped interface */ + if (csa->io_mem) + CS_LOCK(csa->base); +} + +static void etm4_cs_unlock(struct etmv4_drvdata *drvdata, + struct csdev_access *csa) +{ + if (csa->io_mem) + CS_UNLOCK(csa->base); +} + static bool etm4_arch_supported(u8 arch) { /* Mask out the minor version number */ @@ -263,7 +278,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) struct device *etm_dev = &csdev->dev; struct csdev_access *csa = &csdev->access; - CS_UNLOCK(drvdata->base); + + etm4_cs_unlock(drvdata, csa); etm4_enable_arch_specific(drvdata); etm4_os_unlock(drvdata); @@ -366,7 +382,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) isb(); done: - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); dev_dbg(etm_dev, "cpu: %d enable smp call done: %d\n", drvdata->cpu, rc); @@ -623,7 +639,7 @@ static void etm4_disable_hw(void *info) struct csdev_access *csa = &csdev->access; int i; - CS_UNLOCK(drvdata->base); + etm4_cs_unlock(drvdata, csa); etm4_disable_arch_specific(drvdata); if (!drvdata->skip_power_up) { @@ -665,8 +681,7 @@ static void etm4_disable_hw(void *info) } coresight_disclaim_device_unlocked(csdev); - - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); dev_dbg(&drvdata->csdev->dev, "cpu: %d disable smp call done\n", drvdata->cpu); @@ -776,8 +791,7 @@ static void etm4_init_arch_data(void *info) /* Make sure all registers are accessible */ etm4_os_unlock_csa(drvdata, csa); - - CS_UNLOCK(drvdata->base); + etm4_cs_unlock(drvdata, csa); /* find all capabilities of the tracing unit */ etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0); @@ -942,7 +956,7 @@ static void etm4_init_arch_data(void *info) drvdata->nrseqstate = BMVAL(etmidr5, 25, 27); /* NUMCNTR, bits[30:28] number of counters available for tracing */ drvdata->nr_cntr = BMVAL(etmidr5, 28, 30); - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); } /* Set ELx trace filter access in the TRCVICTLR register */ @@ -1323,8 +1337,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) dsb(sy); isb(); - CS_UNLOCK(drvdata->base); - + etm4_cs_unlock(drvdata, csa); /* Lock the OS lock to disable trace and external debugger access */ etm4_os_lock(drvdata); @@ -1437,7 +1450,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, (state->trcpdcr & ~TRCPDCR_PU), TRCPDCR); out: - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); return ret; } @@ -1448,8 +1461,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base); struct csdev_access *csa = &tmp_csa; - CS_UNLOCK(drvdata->base); - + etm4_cs_unlock(drvdata, csa); etm4x_relaxed_write32(csa, state->trcclaimset, TRCCLAIMSET); etm4x_relaxed_write32(csa, state->trcprgctlr, TRCPRGCTLR); @@ -1534,7 +1546,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) /* Unlock the OS lock to re-enable trace and external debug access */ etm4_os_unlock(drvdata); - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); } static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, -- 2.24.1