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Subject: Re: [PATCH 1/1] ARM: imx: build suspend-imx6.S with arm instruction
 set
To:     Max Krummenacher <max.oss.09@gmail.com>
Cc:     Max Krummenacher <max.krummenacher@toradex.com>,
        Lucas Stach <l.stach@pengutronix.de>,
        linux-arm-kernel@lists.infradead.org,
        Fabio Estevam <festevam@gmail.com>,
        Rouven Czerwinski <r.czerwinski@pengutronix.de>,
        linux-kernel@vger.kernel.org,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Russell King <linux@armlinux.org.uk>,
        Shawn Guo <shawnguo@kernel.org>,
        NXP Linux Team <linux-imx@nxp.com>
References: <20210111151704.26296-1-max.krummenacher@toradex.com>
 <20210111151704.26296-2-max.krummenacher@toradex.com>
From:   Ahmad Fatoum <a.fatoum@pengutronix.de>
Message-ID: <ecc65820-6b94-bb11-f475-aa0296fce5b8@pengutronix.de>
Date:   Mon, 11 Jan 2021 18:49:29 +0100
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On 11.01.21 16:17, Max Krummenacher wrote:
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
> 
> It looks like the CPU resumes unconditionally in ARM instruction mode
> and then chokes on the presented Thumb-2 code it should execute.
> 
> Fix this by using the arm instruction set for all code in
> suspend-imx6.S.
> 
> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
> 
> ---
> 
>  arch/arm/mach-imx/suspend-imx6.S | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> index 1eabf2d2834be..e06f946b75b96 100644
> --- a/arch/arm/mach-imx/suspend-imx6.S
> +++ b/arch/arm/mach-imx/suspend-imx6.S
> @@ -67,6 +67,7 @@
>  #define MX6Q_CCM_CCR	0x0
>  
>  	.align 3
> +	.arm

You had a return to thumb at the end of this subroutine in the cover letter,
yet here it's omitted. Why?

>  
>  	.macro  sync_l2_cache
>  
> 

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