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From:   Andy Lutomirski <luto@amacapital.net>
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Subject: Re: [PATCH] mm/userfaultfd: fix memory corruption due to writeprotect
Date:   Tue, 12 Jan 2021 16:31:41 -0800
Message-Id: <68095DFB-7D72-480E-BDF3-3C88B8428867@amacapital.net>
References: <F33D2DD9-97D5-44A0-890B-35FE686E36DC@gmail.com>
Cc:     Will Deacon <will@kernel.org>, Yu Zhao <yuzhao@google.com>,
        Laurent Dufour <ldufour@linux.vnet.ibm.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Vinayak Menon <vinmenon@codeaurora.org>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Andy Lutomirski <luto@kernel.org>,
        Peter Xu <peterx@redhat.com>,
        Andrea Arcangeli <aarcange@redhat.com>,
        linux-mm <linux-mm@kvack.org>,
        lkml <linux-kernel@vger.kernel.org>,
        Pavel Emelyanov <xemul@openvz.org>,
        Mike Kravetz <mike.kravetz@oracle.com>,
        Mike Rapoport <rppt@linux.vnet.ibm.com>,
        stable <stable@vger.kernel.org>,
        Minchan Kim <minchan@kernel.org>, surenb@google.com
In-Reply-To: <F33D2DD9-97D5-44A0-890B-35FE686E36DC@gmail.com>
To:     Nadav Amit <nadav.amit@gmail.com>
Precedence: bulk


> On Jan 12, 2021, at 2:29 PM, Nadav Amit <nadav.amit@gmail.com> wrote:
>=20
> =EF=BB=BF
>>=20
>> On Jan 12, 2021, at 1:43 PM, Will Deacon <will@kernel.org> wrote:
>>=20
>> On Tue, Jan 12, 2021 at 12:38:34PM -0800, Nadav Amit wrote:
>>>> On Jan 12, 2021, at 11:56 AM, Yu Zhao <yuzhao@google.com> wrote:
>>>>> On Tue, Jan 12, 2021 at 11:15:43AM -0800, Nadav Amit wrote:
>>>>>> I will send an RFC soon for per-table deferred TLB flushes tracking.
>>>>>> The basic idea is to save a generation in the page-struct that tracks=

>>>>>> when deferred PTE change took place, and track whenever a TLB flush
>>>>>> completed. In addition, other users - such as mprotect - would use
>>>>>> the tlb_gather interface.
>>>>>>=20
>>>>>> Unfortunately, due to limited space in page-struct this would only
>>>>>> be possible for 64-bit (and my implementation is only for x86-64).
>>>>>=20
>>>>> I don't want to discourage you but I don't think this would end up
>>>>> well. PPC doesn't necessarily follow one-page-struct-per-table rule,
>>>>> and I've run into problems with this before while trying to do
>>>>> something similar.
>>>=20
>>> Discourage, discourage. Better now than later.
>>>=20
>>> It will be relatively easy to extend the scheme to be per-VMA instead of=

>>> per-table for architectures that prefer it this way. It does require
>>> TLB-generation tracking though, which Andy only implemented for x86, so I=

>>> will focus on x86-64 right now.
>>=20
>> Can you remind me of what we're missing on arm64 in this area, please? I'=
m
>> happy to help get this up and running once you have something I can build=

>> on.
>=20
> Let me first finish making something that we can use as a basis for a
> discussion. I do not waste your time before I have something ready.

If you want a hand, let me know.  I suspect you understand the x86 code as w=
ell as I do at this point, though :)