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Subject: Re: [RFC 1/2] dt-bindings: clk: versaclock5: Add load capacitance
 properties
To:     Adam Ford <aford173@gmail.com>, Rob Herring <robh@kernel.org>
Cc:     linux-clk <linux-clk@vger.kernel.org>,
        Adam Ford-BE <aford@beaconembedded.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        devicetree <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
References: <20210106173900.388758-1-aford173@gmail.com>
 <20210113031602.GA1443816@robh.at.kernel.org>
 <CAHCN7xKLRj=bbMQAXNDZ+8cHh+jon5Bb7GdQYpVUos91uiV5Tw@mail.gmail.com>
From:   Luca Ceresoli <luca@lucaceresoli.net>
Message-ID: <8f896ca0-d270-787c-74c9-2bca91ccf7f2@lucaceresoli.net>
Date:   Wed, 13 Jan 2021 15:36:48 +0100
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Hi Adam,

On 13/01/21 13:31, Adam Ford wrote:
> On Tue, Jan 12, 2021 at 9:16 PM Rob Herring <robh@kernel.org> wrote:
>>
>> On Wed, Jan 06, 2021 at 11:38:59AM -0600, Adam Ford wrote:
>>> There are two registers which can set the load capacitance for
>>> XTAL1 and XTAL2. These are optional registers when using an
>>> external crystal.  Update the bindings to support them.
>>>
>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>> ---
>>>  .../devicetree/bindings/clock/idt,versaclock5.yaml   | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
>>> index 2ac1131fd922..e5e55ffb266e 100644
>>> --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
>>> +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
>>> @@ -59,6 +59,18 @@ properties:
>>>      minItems: 1
>>>      maxItems: 2
>>>
>>> +  idt,xtal1-load-femtofarads:
>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>
>> Already has a type, so you can drop the $ref.
>>
>>> +    minimum: 9000
>>> +    maximum: 25000
> 
> Luca,
> 
> Do you want the range to the 9000 - 25000 per the datasheet, or should
> I use the max value based on the programmer guide?  Currently, my
> intent was to cap the value to 11111b, so anyone who writes 23000,
> 24000, or 25000 will all be the same value based on the feedback I got
> from Renesas.

DT should describe the HW, so I'd use the same range that can be set in
hardware, regardless of driver support. Thus it should be:

9000 - [9000 + 430 * 32] = 9000 - 22760

-- 
Luca