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Date:   Wed, 13 Jan 2021 22:00:48 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc:     dan.j.williams@intel.com, linux-kernel@vger.kernel.org,
        dmaengine@vger.kernel.org, vigneshr@ti.com,
        grygorii.strashko@ti.com, kishon@ti.com
Subject: Re: [PATCH v2 0/3] dmaengine: ti: k3-udma: memcpy throughput
 improvement
Message-ID: <20210113163048.GV2771@vkoul-mobl>
References: <20210113114923.9231-1-peter.ujfalusi@gmail.com>
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On 13-01-21, 13:49, Peter Ujfalusi wrote:
> Hi,
> 
> Changes since v1:
> - Added Kishon's tested-by to the first two patch
> - Moved the variable definitions to the start of their respective functions
> - Remove braces where they are not needed
> - correct indentation of cases
> - additional patch to clean up the ret = 0 initializations in tisci channel configuration
>   functions, no functional changes.
> 
> Newer members of the KS3 family (after AM654) have support for burst_size
> configuration for each DMA channel.
> 
> The HW default value is 64 bytes but on higher throughput channels it can be
> increased to 256 bytes (UCHANs) or 128 byes (HCHANs).
> 
> Aligning the buffers and length of the transfer to the burst size also increases
> the throughput.
> 
> Numbers gathered on j721e (UCHAN pair):
> echo 8000000 > /sys/module/dmatest/parameters/test_buf_size
> echo 2000 > /sys/module/dmatest/parameters/timeout
> echo 50 > /sys/module/dmatest/parameters/iterations
> echo 1 > /sys/module/dmatest/parameters/max_channels
> 
> Prior to  this patch:   ~1.3 GB/s
> After this patch:       ~1.8 GB/s
>  with 1 byte alignment: ~1.7 GB/s

Applied, thanks

-- 
~Vinod