Received: by 2002:a05:6a10:2785:0:0:0:0 with SMTP id ia5csp848696pxb; Wed, 13 Jan 2021 18:14:13 -0800 (PST) X-Google-Smtp-Source: ABdhPJziFlWQKMn/V4q4jjoF6POEyRrHGuUKPQJRHuvFE+U8jEkKQeJTDmmj8YK4ed1WAJThNCi/ X-Received: by 2002:a05:6402:388:: with SMTP id o8mr3957795edv.359.1610590453002; Wed, 13 Jan 2021 18:14:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610590452; cv=none; d=google.com; s=arc-20160816; b=0e60aQ3VwrsLYhkAPCaCNwAasX6Sy9DB7eRAfSqxbgayrPfWTWNs4DHS3c3OT9KgrX zoRSZ6ZwRYCQ/tY6X10WCGoI5y3EXJBC5OYFQkuCUFdeu1ALbSwtI7aF+2+buHRwCFRZ KLkOJ3YMGlokLwsjrV8tOM4Q9Uod4MeZDDZ821K+2vZDykL0OsCcfSSY9bFDvmi5LttO TOOsxyPDc5oj740sBQg7xp7+SIQuSgNc5uICmbvRAlsggxdk+ZW4wvke1ITQGqxCDBmD ycUzRFrdErr7cXwi60wQ5KdlOIcTvQj6qwzUQHtKSxfQnBNJrhqzzQvkieO99WGF71MH uduQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=lqO2gu98rTqRClZrnv6+Hso3N3NlwGlH7x9TEtv7YQQ=; b=GRYD6jhphLHiCQpD0bvUT3O7FP801jd69RNrL3NxMp04xTLod+iIMOb4bU/p16Ev/T EP14ijnrzX0ErcUNhRzIZTlumIKRM4sY6cWAyonWRjek9meFQd7EheSxLMvefcFsZuHG AqPU05bMMIL4wWEJ/a1C2ksotrOiFrOhXTLJoUPw4VGOkMYlHfdhiEvsaTRozWoh0IO9 Evv4WIvFEg3nA40gtO2LEsEGMvfuoVLCFRskOY+S+V7gXWTBWCuw3m9xEcn3pQpxx8TX 6jlmzBznPjQgPcOznim/wqGwdtMykjbQ2VSw+cRTJTKOUoanYnJw13/2sxE+j+kE2Lwx lGCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w17si1917367edr.34.2021.01.13.18.13.49; Wed, 13 Jan 2021 18:14:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727211AbhANCMu (ORCPT + 99 others); Wed, 13 Jan 2021 21:12:50 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:38858 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728442AbhAMV6S (ORCPT ); Wed, 13 Jan 2021 16:58:18 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id CBF1C1F45763 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: matthias.bgg@gmail.com, drinkcat@chromium.org, hsinyi@chromium.org, Collabora Kernel ML , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH] arm64: dts: mt8183: Add missing power-domain for pwm0 node Date: Wed, 13 Jan 2021 22:57:23 +0100 Message-Id: <20210113215723.71966-1-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The MT8183 display PWM device will not work until the associated power-domain is enabled. Add the power-domain reference to the node allows the display PWM driver to operate and the backlight turn on. Fixes: f15722c0fef0 ("arm64: dts: mt8183: Add pwm and backlight node") Signed-off-by: Enric Balletbo i Serra --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index bda283fa9245..8471c973dfd5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -661,6 +661,7 @@ pwm0: pwm@1100e000 { compatible = "mediatek,mt8183-disp-pwm"; reg = <0 0x1100e000 0 0x1000>; interrupts = ; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; #pwm-cells = <2>; clocks = <&topckgen CLK_TOP_MUX_DISP_PWM>, <&infracfg CLK_INFRA_DISP_PWM>; -- 2.29.2