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Date:   Thu, 14 Jan 2021 10:44:25 +0100
From:   Borislav Petkov <bp@alien8.de>
To:     Krzysztof Mazur <krzysiek@podlesie.net>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, x86@kernel.org,
        linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH] x86/lib: don't use MMX before FPU initialization
Message-ID: <20210114094425.GA12284@zn.tnic>
References: <20201228160631.32732-1-krzysiek@podlesie.net>
 <20210112000923.GK25645@zn.tnic>
 <20210114092218.GA26786@shrek.podlesie.net>
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On Thu, Jan 14, 2021 at 10:22:18AM +0100, Krzysztof Mazur wrote:
> So, I'm guessing that the K7 does not like ldmxcsr(), when FXSR
> or/and XMM are not enabled in CR4 (in fpu__init_cpu_generic()).
> I verified that by adding kernel_fpu_begin()+kernel_fpu_end()
> pair, before and after cr4_set_bits() in fpu__init_cpu_generic()
> (on a kernel with disabled early MMX-optimized memcpy).

Ah, ok, that makes sense. If X86_CR4_OSFXSR is not set, we cannot use
legacy SSE1 insns and LDMXCSR is one of them.

I believe the correct fix should be

	if (unlikely(in_interrupt()) || !(cr4_read_shadow() & X86_CR4_OSFXSR))
		return __memcpy(to, from, len);

in _mmx_memcpy() as you had it in your first patch.

Wanna try it and if it works, send a proper patch?

Also pls put a comment above it that that CR4 bit needs to be tested
before using SSE insns.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette