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From:   Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To:     olek2@wp.pl
Cc:     devicetree@vger.kernel.org, john@phrozen.org,
        linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
        robh+dt@kernel.org, tsbogend@alpha.franken.de
Subject: RE: [PATCH] dt-bindings: mips: lantiq: Document Lantiq Xway CGU bindings
Date:   Sat, 16 Jan 2021 21:29:22 +0100
Message-Id: <20210116202922.147964-1-martin.blumenstingl@googlemail.com>
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(sorry for only seeing this late)

[...]
> +maintainers:
> +  - John Crispin <john@phrozen.org>
personally I think we should get at least John's Acked-by but I don't
know if there's any rule for adding a dt-binding for some other
maintainer

[...]
> +required:
> +  - compatible
> +  - reg
based on "DOs and DON’Ts for designing and writing Devicetree bindings"
from [0] I think this is incomplete
As far as I know CGU contains some PLLs. These PLLs need at least one
input: the main XTAL which is found on the board

Also the Lantiq code does not use the common clock framework yet. Once
that's used we also need #clock-cells = <1>. I don't know if that
should be added already (or not).

> +examples:
> +  - |
> +    cgu@103000 {
this should be clock-controller@...


Best regards,
Martin


[0] https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-bindings.html