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From:   Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To:     olek2@wp.pl
Cc:     devicetree@vger.kernel.org, john@phrozen.org,
        linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
        robh+dt@kernel.org, tsbogend@alpha.franken.de
Subject: RE: [PATCH] dt-bindings: mips: lantiq: Document Lantiq Xway EBU bindings
Date:   Sat, 16 Jan 2021 21:34:46 +0100
Message-Id: <20210116203446.148603-1-martin.blumenstingl@googlemail.com>
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(again, sorry for seeing this patch late)

> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - lantiq,ebu-xway
I think this compatible string is very generic and with that comes some
problems.
There is actually two different versions of this IP: one which has
support for controlling the interrupt of the PCI controller on some
SoCs (Danube, xRX100, xRX200). Other SoC variants (Falcon, Amazon-SE)
don't have that interrupt-controller as they don't have PCI support.

Also there is at least one clock input. I *assume* we need to describe
it but I am not sure (as this platform doesn't use the common clock
framework yet).

My version of this can be found here [0]. It's still sitting in my
tree because it has a dependency on an ICU patch in my tree which I
could not make work properly yet.


Best regards,
Martin


[0] https://github.com/xdarklight/linux/blob/8d5c632e11fe0ca14497efc2f9d99b69f75590ba/Documentation/devicetree/bindings/mips/lantiq/lantiq%2Cebu.yaml