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Date:   Sun, 17 Jan 2021 12:24:46 +0100
From:   Wolfram Sang <wsa@the-dreams.de>
To:     Sowjanya Komatineni <skomatineni@nvidia.com>
Cc:     thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com,
        linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-i2c@vger.kernel.org
Subject: Re: [PATCH v3] i2c: tegra: Create i2c_writesl_vi() to use with VI
 I2C for filling TX FIFO
Message-ID: <20210117112446.GC1983@ninjato>
References: <1610478161-4877-1-git-send-email-skomatineni@nvidia.com>
 <1610478161-4877-2-git-send-email-skomatineni@nvidia.com>
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On Tue, Jan 12, 2021 at 11:02:41AM -0800, Sowjanya Komatineni wrote:
> VI I2C controller has known hardware bug where immediate multiple
> writes to TX_FIFO register gets stuck.
>=20
> Recommended software work around is to read I2C register after
> each write to TX_FIFO register to flush out the data.
>=20
> This patch implements this work around for VI I2C controller.
>=20
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>

Applied to for-current, thanks!


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