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From:   Felipe Balbi <balbi@kernel.org>
To:     Michael Grzeschik <mgr@pengutronix.de>,
        Manish Narani <manish.narani@xilinx.com>
Cc:     gregkh@linuxfoundation.org, robh+dt@kernel.org,
        michal.simek@xilinx.com, p.zabel@pengutronix.de,
        devicetree@vger.kernel.org, linux-usb@vger.kernel.org,
        linux-kernel@vger.kernel.org, git@xilinx.com,
        linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de
Subject: Re: [RESEND PATCH v3 2/2] usb: dwc3: Add driver for Xilinx platforms
In-Reply-To: <20210118134223.GE12316@pengutronix.de>
References: <1608015291-52007-1-git-send-email-manish.narani@xilinx.com>
 <1608015291-52007-3-git-send-email-manish.narani@xilinx.com>
 <20210118134223.GE12316@pengutronix.de>
Date:   Mon, 18 Jan 2021 17:24:38 +0200
Message-ID: <87r1miuv2h.fsf@kernel.org>
MIME-Version: 1.0
Content-Type: text/plain
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Hi,

Michael Grzeschik <mgr@pengutronix.de> writes:
> On Tue, Dec 15, 2020 at 12:24:51PM +0530, Manish Narani wrote:
>>Add a new driver for supporting Xilinx platforms. This driver is used
>>for some sequence of operations required for Xilinx USB controllers.
>>This driver is also used to choose between PIPE clock coming from SerDes
>>and the Suspend Clock. Before the controller is out of reset, the clock
>>selection should be changed to PIPE clock in order to make the USB
>>controller work. There is a register added in Xilinx USB controller
>>register space for the same.
>
> I tried out this driver with the vanilla kernel on an zynqmp. Without
> this patch the USB-Gadget is already acting buggy. In the gadget mode,
> some iterations of plug/unplug results to an stalled gadget which will
> never come back without a reboot.
>
> With the corresponding code of this driver (reset assert, clk modify,
> reset deassert) in the downstream kernels phy driver we found out it is
> totaly stable. But using this exact glue driver which should do the same
> as the downstream code, the gadget still was buggy the way described
> above.
>
> I suspect the difference lays in the different order of operations.
> While the downstream code is runing the resets inside the phy driver
> which is powered and initialized in the dwc3-core itself. With this glue
> layser approach of this patch the whole phy init is done before even
> touching dwc3-core in any way. It seems not to have the same effect,
> though.
>
> If really the order of operations is limiting us, we probably need
> another solution than this glue layer. Any Ideas?

might be a good idea to collect dwc3 trace events. Can you do that?

-- 
balbi