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[209.85.167.48]) by smtp.gmail.com with ESMTPSA id l84sm1779588lfd.75.2021.01.17.22.25.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 17 Jan 2021 22:25:54 -0800 (PST) Received: by mail-lf1-f48.google.com with SMTP id v67so22425293lfa.0; Sun, 17 Jan 2021 22:25:54 -0800 (PST) X-Received: by 2002:a19:810:: with SMTP id 16mr11002147lfi.233.1610951154213; Sun, 17 Jan 2021 22:25:54 -0800 (PST) MIME-Version: 1.0 References: <20201218195033.2301127-1-contact@paulk.fr> <3035881.9zrMQt1rZd@jernej-laptop> In-Reply-To: From: Chen-Yu Tsai Date: Mon, 18 Jan 2021 14:25:42 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] ARM: dts: sun8i-v3s: Add CSI0 MCLK pin definition To: Paul Kocialkowski Cc: devicetree , linux-arm-kernel , linux-kernel , Maxime Ripard , Jernej Skrabec Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 30, 2020 at 11:29 AM Chen-Yu Tsai wrote: > > On Tue, Dec 22, 2020 at 4:17 PM Jernej Škrabec wrote: > > > > Hi! > > > > Dne petek, 18. december 2020 ob 20:50:33 CET je Paul Kocialkowski napisal(a): > > > This adds a device-tree definition for the CSI0 MCLK pin, > > > which can be used for feeding MIPI CSI-2 sensors. > > > > > > Signed-off-by: Paul Kocialkowski > > > > Is this used anywhere? Current policy is to add pin definitions only if any > > user exists. > > IIRC we sort of loosened that requirement with the use of /omit-if-no-ref/. > The A20 dtsi file has a whole bunch of pins defined that are not directly > used but are available for users to reference, especially in overlays. > The "-@" parameter for the device tree compiler, used to build overlay > compatible DTBs, makes the compiler ignore /omit-if-no-ref/ and include > all the nodes. I've queued up this patch for 5.12. ChenYu