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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id j23sm2562857edv.45.2021.01.21.02.27.22 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Jan 2021 02:27:22 -0800 (PST) Sender: Michal Simek From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com Cc: Kalyani Akula , Krzysztof Kozlowski , Laurent Pinchart , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 10/12] arm64: dts: zynqmp: Add missing lpd watchdog node Date: Thu, 21 Jan 2021 11:26:58 +0100 Message-Id: <0489a1d5528614f1d570ea153d38b813f0c1eb9f.1611224800.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Xilinx ZynqMP SoC has FPD (Full Power Domain) and LPD (Low Power Domain) watchdogs. There are cases where also LPD WDT should be used by Arm cores that's why list it with disabled status. Signed-off-by: Michal Simek --- Changes in v2: None arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 ++++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 9 +++++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index 6a577e1383c1..3ca7e4ee51b5 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -223,3 +223,7 @@ &usb1 { &watchdog0 { clocks = <&zynqmp_clk WDT>; }; + +&lpd_watchdog { + clocks = <&zynqmp_clk LPD_WDT>; +}; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 533c19b80283..467f92c2044b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -786,5 +786,14 @@ watchdog0: watchdog@fd4d0000 { reg = <0x0 0xfd4d0000 0x0 0x1000>; timeout-sec = <10>; }; + + lpd_watchdog: watchdog@ff150000 { + compatible = "cdns,wdt-r1p2"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 52 1>; + reg = <0x0 0xff150000 0x0 0x1000>; + timeout-sec = <10>; + }; }; }; -- 2.30.0