Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp934046pxb; Fri, 22 Jan 2021 03:02:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJzyJ9HRXgY0ybwqJajTwIso1MjKTJv2+fF78gNB9BbVBHe9knjLnBfbEDjto4qFo6Wq4+nm X-Received: by 2002:a17:906:7215:: with SMTP id m21mr2572181ejk.248.1611313378549; Fri, 22 Jan 2021 03:02:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611313378; cv=none; d=google.com; s=arc-20160816; b=tgRA7vHc6ZeKFLa6i5sEcqVYmGRTWzzy4Btoh1uDTNJyC1XFrehVwOybXoKZ/tOOHR +vofXjQBzYzyiN9qXsGTumwREDYBWD6K/BdkXGCto791R8xi1uX20eb9dFslobLT/SjG v6vOe4gTE5rtJ5pn0Py1xygstV8eEUrBE0mIqRL7IZZWoqe6eOBJ6TxcFiEua5iXwied Skdnmhm6afWBx3gqmMtvdqhJQ8tpir9ebykkS/oKSOfyCXeKXi65lCPpEUGbWzOnB0l3 trFcV2Fx1sJa+OzwYJHNQzQ2Jpe0JmLOsc1wsrNmYOb6g5vlHuye3qTcHOWQs2uyCqZu gMrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=JulSSnbmn/ODg792hatyNg+R8GdjukARkpZyZAZHMmA=; b=u10jA8n++y+OW5M4Eg1K16rOqWjWphKBwwzI+lIziacsc63qtWKuqkLVdEucJfzQCt H53DfF+6H+kiv6+W5+bQNz5MnmoTAqauQWKaWDELhdR0KAwZgsgf4m25pba471+jvYz+ JBIMHJo+Xl7eN6ZidgQ4B+snip7BvgAp9sH290mwYNBN29hRYYzj7sZbFqkiWTKdu/pp CFMtHPJE8b9/8VRLFASkL/HgQiwmPmc7+L7OYJvx5oTUJSj12Zsr9aNLtuF0YQmpPTXn kd9MOQWOIxivFU2U+b5fMkB3dVWccZcewErj9EFH1RnkmjvqcUZ7cbg+FUD+EZzDEX4o vrGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=B6fZnLNH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v8si3325162edc.382.2021.01.22.03.02.34; Fri, 22 Jan 2021 03:02:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=B6fZnLNH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728041AbhAVLAA (ORCPT + 99 others); Fri, 22 Jan 2021 06:00:00 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:35714 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727645AbhAVKwU (ORCPT ); Fri, 22 Jan 2021 05:52:20 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10MAlUiA011339; Fri, 22 Jan 2021 11:51:25 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=JulSSnbmn/ODg792hatyNg+R8GdjukARkpZyZAZHMmA=; b=B6fZnLNHyHiPS2qhGttFFZOwL2dl7HW1Z/LCQqfKTPXhOVI890xO1mA3YzBptU8JmZo0 S00hePEppEVHNp6gFsFcKd7xJYmF1pL8FSA+zuSMMYJ//cuVA5kJI9ByR3xsc6kH4WdT avbgA87OmRK9CO9+kUXIT+6weakaCMVqde+sNdfOxR+leH2CbBF41JEERoEaisEEYz7h Hn+xmwWW6E2TI1IKUtgDcNcnk0LBcT13B4UVZIlYvooOFQY2/smtH/CriTbyKWlyU6Us AfCnannXTnM9xWD3aSRIyH13sO/viXGrZTG980/upaNXT9hmwyMg1uPHhYj86GV6AeZ/ KQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 3668pe1e1y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Jan 2021 11:51:25 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C9132100038; Fri, 22 Jan 2021 11:51:24 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id BB0F322DBCA; Fri, 22 Jan 2021 11:51:24 +0100 (CET) Received: from localhost (10.75.127.49) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 22 Jan 2021 11:51:24 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Etienne Carriere , Gabriel Fernandez CC: , , , , Subject: [PATCH 08/14] dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15 Date: Fri, 22 Jan 2021 11:50:55 +0100 Message-ID: <20210122105101.27374-9-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210122105101.27374-1-gabriel.fernandez@foss.st.com> References: <20210122105101.27374-1-gabriel.fernandez@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG1NODE2.st.com (10.75.127.2) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343,18.0.737 definitions=2021-01-22_06:2021-01-21,2021-01-22 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez stm32mp15 TZ secure firmware provides SCMI reset domains for secure resources. This change defines the SCMI reset domain identifiers used by SCMI agents and servers. Stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some PLL output and few secure aware interfaces. This change defines the SCMI clock identifiers used by SCMI agents and servers. Server SCMI0 exposes reset controllers for resources under RCC[TZEN] configuration control. Signed-off-by: Etienne Carriere Signed-off-by: Gabriel Fernandez --- include/dt-bindings/reset/stm32mp1-resets.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h index f0c3aaef67a0..bc71924faa54 100644 --- a/include/dt-bindings/reset/stm32mp1-resets.h +++ b/include/dt-bindings/reset/stm32mp1-resets.h @@ -105,4 +105,17 @@ #define GPIOJ_R 19785 #define GPIOK_R 19786 +/* SCMI reset domain identifiers */ +#define RST_SCMI0_SPI6 0 +#define RST_SCMI0_I2C4 1 +#define RST_SCMI0_I2C6 2 +#define RST_SCMI0_USART1 3 +#define RST_SCMI0_STGEN 4 +#define RST_SCMI0_GPIOZ 5 +#define RST_SCMI0_CRYP1 6 +#define RST_SCMI0_HASH1 7 +#define RST_SCMI0_RNG1 8 +#define RST_SCMI0_MDMA 9 +#define RST_SCMI0_MCU 10 + #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */ -- 2.17.1