Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates
 149.199.62.198 as permitted sender) receiver=protection.outlook.com;
 client-ip=149.199.62.198; helo=xsj-pvapexch01.xlnx.xilinx.com;
Envelope-to: michal.simek@xilinx.com,
 linux-kernel@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org,
 devicetree@vger.kernel.org,
 robh+dt@kernel.org,
 xe-linux-external@cisco.com,
 dwalker@fifo99.com,
 broonie@kernel.org,
 danielwa@cisco.com
To:     "Daniel Walker (danielwa)" <danielwa@cisco.com>,
        Michal Simek <michal.simek@xilinx.com>,
        Mark Brown <broonie@kernel.org>
CC:     Daniel Walker <dwalker@fifo99.com>,
        "xe-linux-external(mailer list)" <xe-linux-external@cisco.com>,
        Rob Herring <robh+dt@kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
References: <20210121231237.30664-1-danielwa@cisco.com>
 <185100f4-67f1-140b-ad01-9997891e68da@xilinx.com>
 <20210122203240.GS3710@zorba>
From:   Michal Simek <michal.simek@xilinx.com>
Subject: Re: [PATCH 1/2] arm64: boot: dts: add new dts for hellcat & petra
Message-ID: <849cc330-8545-f1cd-1715-5244e399897e@xilinx.com>
Date:   Mon, 25 Jan 2021 08:52:01 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.6.1
MIME-Version: 1.0
In-Reply-To: <20210122203240.GS3710@zorba>
Content-Type: text/plain; charset="utf-8"
Content-Language: en-US
Content-Transfer-Encoding: 8bit
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2021 07:52:07.5821
 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: c24f8b0d-525d-4841-c609-08d8c1061d31
X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com]
X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT028.eop-nam02.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB4448
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi Daniel,

On 1/22/21 9:32 PM, Daniel Walker (danielwa) wrote:
> On Fri, Jan 22, 2021 at 09:48:53AM +0100, Michal Simek wrote:
>> Hi Daniel,
>>
>> On 1/22/21 12:12 AM, Daniel Walker wrote:
>>> Add Petra and Hellcat dts file. These platforms are based on
>>> the Xilinx Zynqmp platform.
>>>
>>> Signed-off-by: Daniel Walker <dwalker@fifo99.com>
>>> Cc: xe-linux-external@cisco.com
>>> ---
>>>  arch/arm64/boot/dts/xilinx/Makefile           |   2 +
>>>  .../boot/dts/xilinx/zynqmp-petra-hellcat.dts  | 856 ++++++++++++++++++
>>>  arch/arm64/boot/dts/xilinx/zynqmp-petra.dts   | 847 +++++++++++++++++
>>>  3 files changed, 1705 insertions(+)
>>>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-petra-hellcat.dts
>>>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-petra.dts
>>
>> First of all I can't see 2/2.
>  
> It wasn't being submitted to you. But here it is if you care to look at it.
> 
> https://lkml.org/lkml/2021/1/21/1468

I think spi-dev should enable the same approach as is used by uio driver.
Take a look at 05c3e0bb5629b897b0459e4bfb1b93d729033b99
But it is up to Mark it this could be reasonable solution for this driver.

> 
>>
>> Long time ago we said that we are not going to push any PL related
>> configurations. It means all below can't be merged.
>> And there are also coding style issues.
> 
> You'll need to explain this more. It's likely this was added at the suggestion of
> Xilinx. If it can't be upstreamed what should we replace it with ?

No idea who gave you this suggestion from Xilinx.

I had similar thread with Michael Walle about supporting Ebang board.
PL depends on your custom design and can change quite quickly that's
there is no good/bad configuration. That's why all of them can be valid
and kernel is not the right location to store thousands of
configurations (likely in overlay form). That's why only fixed
configurations for PS are added to kernel.
And I prefer if there is any good reason behind why these platforms
should be added.

> I will review your other comments and re-submit.

Happy to take a look at it again but completely remove PL description.

Thanks,
Michal