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Mon, 25 Jan 2021 17:35:01 +0000 Subject: [PATCH v2 3/8] cpupower: Add CPUPOWER_CAP_AMD_HW_PSTATE cpuid caps flag From: Nathan Fontenot To: rrichter@amd.com, shuah@kernel.org, linux-kernel@vger.kernel.org, trenn@suse.com, linux-pm@vger.kernel.org Cc: boris.ostrovsky@oracle.com, joao.m.martins@oracle.com, konrad.wilk@oracle.com Date: Mon, 25 Jan 2021 11:34:49 -0600 Message-ID: <161159608909.68367.2355673294254507345.stgit@ethanol01c7-host.amd.com> In-Reply-To: <161159600371.68367.14890273216040482793.stgit@ethanol01c7-host.amd.com> References: <161159600371.68367.14890273216040482793.stgit@ethanol01c7-host.amd.com> User-Agent: StGit/0.17.1-dirty Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.78.2] X-ClientProxiedBy: SA9PR13CA0024.namprd13.prod.outlook.com (2603:10b6:806:21::29) To SN6PR12MB4720.namprd12.prod.outlook.com (2603:10b6:805:e6::31) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from ethanol01c7-host.amd.com (165.204.78.2) by SA9PR13CA0024.namprd13.prod.outlook.com (2603:10b6:806:21::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.5 via Frontend Transport; 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The cpuid flag is set when CPUID_80000007_EDX[7] is set, which is all families >= 10h. The check excludes family 14h because HW pstate reporting was not implemented on family 14h. This is intended to reduce family checks in the main code paths. Signed-off-by: Nathan Fontenot --- Updates for v2: Update and add back previously removed comment. --- tools/power/cpupower/utils/helpers/amd.c | 9 ++++----- tools/power/cpupower/utils/helpers/cpuid.c | 12 +++++++++--- tools/power/cpupower/utils/helpers/helpers.h | 1 + 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c index 34368436bbd6..8b69c7ff639a 100644 --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c @@ -94,11 +94,10 @@ int decode_pstates(unsigned int cpu, unsigned int cpu_family, union core_pstate pstate; unsigned long long val; - /* Only read out frequencies from HW when CPU might be boostable - to keep the code as short and clean as possible. - Otherwise frequencies are exported via ACPI tables. - */ - if (cpu_family < 0x10 || cpu_family == 0x14) + /* Only read out frequencies from HW if HW Pstate is supported, + * otherwise frequencies are exported via ACPI tables. + */ + if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_HW_PSTATE)) return -1; if (read_msr(cpu, MSR_AMD_PSTATE_LIMIT, &val)) diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c index f9a66a430b72..d577220a193b 100644 --- a/tools/power/cpupower/utils/helpers/cpuid.c +++ b/tools/power/cpupower/utils/helpers/cpuid.c @@ -128,9 +128,15 @@ int get_cpu_info(struct cpupower_cpu_info *cpu_info) /* AMD or Hygon Boost state enable/disable register */ if (cpu_info->vendor == X86_VENDOR_AMD || cpu_info->vendor == X86_VENDOR_HYGON) { - if (ext_cpuid_level >= 0x80000007 && - (cpuid_edx(0x80000007) & (1 << 9))) - cpu_info->caps |= CPUPOWER_CAP_AMD_CPB; + if (ext_cpuid_level >= 0x80000007) { + if (cpuid_edx(0x80000007) & (1 << 9)) + cpu_info->caps |= CPUPOWER_CAP_AMD_CPB; + + if ((cpuid_edx(0x80000007) & (1 << 7)) && + cpu_info->family != 0x14) + /* HW pstate was not implemented in family 0x14 */ + cpu_info->caps |= CPUPOWER_CAP_AMD_HW_PSTATE; + } if (ext_cpuid_level >= 0x80000008 && cpuid_ebx(0x80000008) & (1 << 4)) diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h index a84f85a9dbd2..5f61eefff5b2 100644 --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h @@ -70,6 +70,7 @@ enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL, #define CPUPOWER_CAP_IS_SNB 0x00000020 #define CPUPOWER_CAP_INTEL_IDA 0x00000040 #define CPUPOWER_CAP_AMD_RDPRU 0x00000080 +#define CPUPOWER_CAP_AMD_HW_PSTATE 0x00000100 #define CPUPOWER_AMD_CPBDIS 0x02000000