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Mon, 25 Jan 2021 21:04:19 +0000 From: "Daniel Walker (danielwa)" To: Michal Simek CC: Mark Brown , Daniel Walker , "xe-linux-external(mailer list)" , Rob Herring , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 1/2] arm64: boot: dts: add new dts for hellcat & petra Thread-Topic: [PATCH 1/2] arm64: boot: dts: add new dts for hellcat & petra Thread-Index: AQHW812lwVKiYqawu0ux3HJtZz9QMg== Date: Mon, 25 Jan 2021 21:04:19 +0000 Message-ID: <20210125210419.GU3710@zorba> References: <20210121231237.30664-1-danielwa@cisco.com> <185100f4-67f1-140b-ad01-9997891e68da@xilinx.com> <20210122203240.GS3710@zorba> <849cc330-8545-f1cd-1715-5244e399897e@xilinx.com> In-Reply-To: <849cc330-8545-f1cd-1715-5244e399897e@xilinx.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, OOF, AutoReply X-MS-TNEF-Correlator: user-agent: Mutt/1.9.4 (2018-02-28) authentication-results: xilinx.com; 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charset="us-ascii" Content-ID: <625E3E2C9A602A4DBE26BB580B710191@namprd11.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR11MB5037.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 882c313e-6630-4121-93c4-08d8c174c861 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Jan 2021 21:04:19.4662 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 5ae1af62-9505-4097-a69a-c1553ef7840e X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: H9A/N3+FGgNo1n9muJRnqLMYy3Xr073GzNNtxOkSeoesjUzADzot8qVNuj2InArux9EiZbydgRFG2UcuANf3+A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2662 X-OriginatorOrg: cisco.com X-Outbound-SMTP-Client: 173.36.7.13, xch-aln-003.cisco.com X-Outbound-Node: alln-core-11.cisco.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 25, 2021 at 08:52:01AM +0100, Michal Simek wrote: > >=20 > >> > >> Long time ago we said that we are not going to push any PL related > >> configurations. It means all below can't be merged. > >> And there are also coding style issues. > >=20 > > You'll need to explain this more. It's likely this was added at the sug= gestion of > > Xilinx. If it can't be upstreamed what should we replace it with ? >=20 > No idea who gave you this suggestion from Xilinx. =20 Just an FYI , I didn't write this dts or work on it's original development = so I can't name names. > I had similar thread with Michael Walle about supporting Ebang board. > PL depends on your custom design and can change quite quickly that's > there is no good/bad configuration. That's why all of them can be valid > and kernel is not the right location to store thousands of > configurations (likely in overlay form). That's why only fixed > configurations for PS are added to kernel. > And I prefer if there is any good reason behind why these platforms > should be added. I'm not sure what your talking about above .. Are you suggesting the change= s in my DTS will change quickly ? They have been the same for years , we don't p= lan to change them. This DTS is not a prototype it's a released Cisco product. If I did delete this "PL configuration" where would you expect it to re-app= ear ? Typically things which aren't upstreamable are transformed into something e= lse, it's rare that something is just removed and has no transformation. Daniel=