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Subject: Re: [PATCH v6 3/4] usb: dwc3: Resize TX FIFOs to meet EP bursting
 requirements
To:     Bjorn Andersson <bjorn.andersson@linaro.org>
Cc:     balbi@kernel.org, gregkh@linuxfoundation.org, robh+dt@kernel.org,
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 <20210126015543.GB1241218@yoga>
From:   Wesley Cheng <wcheng@codeaurora.org>
Message-ID: <99dd9419-a8fd-9eb2-9582-d24f865ecf70@codeaurora.org>
Date:   Mon, 25 Jan 2021 20:32:47 -0800
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On 1/25/2021 5:55 PM, Bjorn Andersson wrote:
> On Mon 25 Jan 19:14 CST 2021, Wesley Cheng wrote:
> 
>>
>>
>> On 1/22/2021 9:12 AM, Bjorn Andersson wrote:
>>> On Thu 21 Jan 22:01 CST 2021, Wesley Cheng wrote:
>>>
>>
>> Hi Bjorn,
>>>
>>> Under what circumstances should we specify this? And in particular are
>>> there scenarios (in the Qualcomm platforms) where this must not be set?
>>> The TXFIFO dynamic allocation is actually a feature within the DWC3
>> controller, and isn't specifically for QCOM based platforms.  It won't
>> do any harm functionally if this flag is not set, as this is meant for
>> enhancing performance/bandwidth.
>>
>>> In particular, the composition can be changed in runtime, so should we
>>> set this for all Qualcomm platforms?
>>>
>> Ideally yes, if we want to increase bandwith for situations where SS
>> endpoint bursting is set to a higher value.
>>
>>> And if that's the case, can we not just set it from the qcom driver?
>>>
>> Since this is a common DWC3 core feature, I think it would make more
>> sense to have it in DWC3 core instead of a vendor's DWC3 glue driver.
>>
> 
> I don't have any objections to implementing it in the core driver, but
> my question is can we just skip the DT binding and just enable it from
> the vendor driver?
> 
> Regards,
> Bjorn
> 

Hi Bjorn,

I see.  I think there are some designs which don't have a DWC3 glue
driver, so assuming there may be other platforms using this, there may
not always be a vendor driver to set this.

Thanks
Wesley Cheng

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