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Date:   Tue, 26 Jan 2021 11:03:42 +0100
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Mark Brown <broonie@kernel.org>
Cc:     Sowjanya Komatineni <skomatineni@nvidia.com>, jonathanh@nvidia.com,
        robh+dt@kernel.org, lukas@wunner.de, bbrezillon@kernel.org,
        p.yadav@ti.com, tudor.ambarus@microchip.com,
        linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID
 TEGRA210_CLK_QSPI_PM
Message-ID: <YA/o/stKkt7I0tg1@ulmo>
References: <1608585459-17250-1-git-send-email-skomatineni@nvidia.com>
 <1608585459-17250-2-git-send-email-skomatineni@nvidia.com>
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On Mon, Dec 21, 2020 at 01:17:31PM -0800, Sowjanya Komatineni wrote:
> Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
> when using DDR interface mode.
>=20
> This patch adds clock ID for this to dt-binding.
>=20
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
>  include/dt-bindings/clock/tegra210-car.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Hi Mark,

It looks like you applied this patch along with the driver patches.
Unfortunately, if I apply the DT updates without this patch, the DT
files will fail to build because this symbol is missing.

Since the TEGRA210_CLK_QSPI_PM symbol isn't used by the driver patches
directly, would you mind dropping this so that I can pick it up into the
Tegra tree along with the DT updates?

I realize this is completely unobvious, so sorry for not noticing and
bringing this up earlier.

Thanks,
Thierry

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