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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id z8sm3858515oon.10.2021.01.26.06.01.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 06:01:31 -0800 (PST) Date: Tue, 26 Jan 2021 08:01:29 -0600 From: Bjorn Andersson To: Lee Jones Cc: linux-kernel@vger.kernel.org, Andy Gross , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH 13/21] clk: qcom: gcc-ipq4019: Remove unused variable 'ret' Message-ID: <20210126140129.GD1241218@yoga> References: <20210126124540.3320214-1-lee.jones@linaro.org> <20210126124540.3320214-14-lee.jones@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20210126124540.3320214-14-lee.jones@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 26 Jan 06:45 CST 2021, Lee Jones wrote: > Fixes the following W=1 kernel build warning(s): > > drivers/clk/qcom/gcc-ipq4019.c: In function ?clk_cpu_div_set_rate?: > drivers/clk/qcom/gcc-ipq4019.c:1279:6: warning: variable ?ret? set but not used [-Wunused-but-set-variable] > > Cc: Andy Gross > Cc: Bjorn Andersson > Cc: Michael Turquette > Cc: Stephen Boyd > Cc: linux-arm-msm@vger.kernel.org > Cc: linux-clk@vger.kernel.org Reviewed-by: Bjorn Andersson > Signed-off-by: Lee Jones > --- > drivers/clk/qcom/gcc-ipq4019.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c > index ef5137fd50f3f..8abad4032de71 100644 > --- a/drivers/clk/qcom/gcc-ipq4019.c > +++ b/drivers/clk/qcom/gcc-ipq4019.c > @@ -1276,16 +1276,15 @@ static int clk_cpu_div_set_rate(struct clk_hw *hw, unsigned long rate, > struct clk_fepll *pll = to_clk_fepll(hw); > const struct freq_tbl *f; > u32 mask; > - int ret; > > f = qcom_find_freq(pll->freq_tbl, rate); > if (!f) > return -EINVAL; > > mask = (BIT(pll->cdiv.width) - 1) << pll->cdiv.shift; > - ret = regmap_update_bits(pll->cdiv.clkr.regmap, > - pll->cdiv.reg, mask, > - f->pre_div << pll->cdiv.shift); > + regmap_update_bits(pll->cdiv.clkr.regmap, > + pll->cdiv.reg, mask, > + f->pre_div << pll->cdiv.shift); > /* > * There is no status bit which can be checked for successful CPU > * divider update operation so using delay for the same. > -- > 2.25.1 >