Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp639461pxb; Wed, 27 Jan 2021 17:40:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJywkqOg2pCmELg8vB1dWw8jZ4svUl+TYj0pG54kFUy9Qzek0OvrJ+KsAhEAM+bzOeCSdM38 X-Received: by 2002:a17:906:c0cd:: with SMTP id bn13mr8523828ejb.368.1611798054061; Wed, 27 Jan 2021 17:40:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611798054; cv=none; d=google.com; s=arc-20160816; b=wAFtcBrkHwvkpFCtNlIJYjINyz3SybO//9vwi9gFCoJBcF88TMrYy3WayrYxzQu6TS h/NU3sfY7G05KDqAx45OwUiNQyUfBz1VobBl7EqR+TaBdRIk03ORqllSyjBCXRVVwRMr sHFXl9Zo2l3h81xGma19m4PcO0UP6ouGsqGdjE7Tj/Q+OKI9i8e+EBh2wBPP9xlvb45E eXpuXTnibWZgOHY6Bf1yF+a4PGXxSvhWYkPWK4846s7k2sH25cvVbO1PjBLYj6Msj5vY E0GjQ+mqLwZ5H089uZDRO2YePR6O4E7StrG6rmaE81OiFQ68mlgBDKp+kzz6N6k6tafl z9WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=yBdA7Nf3DvwxZdzX00Eonq9lYvdJAq2LlEJMLWdaFgQ=; b=spLdNh3QoxxqHMUPHzbO5KMMuj12suxgNABIIW1JB8h+uK9pksU8bTAimSTuGem8zr 5IWrPRq0N4heeTiXPTH2H0KI38k9emfQ6hBf6/1V0uPVQQta5DdB/is62q/HlS58Mw9U 40J3Hl4+bKVE6lsNfvUxAjUspHddzqb/FlnWOmOC8krYJs3GzAjzyYsfTOLt3O74ZByT MFuSQamJ5CJc4/qmQ8j9KaSm1Te0FDyudsQeEBQFl3bNs8PPYyzSlCOhZp01QMle9zlG pv6IH6v/EpbD+mmnnJRDI38zcc7Hd/BvEgymz6VCdu8JxX9Oh+vogSqOhKprso/6U8SV 7sxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=V8QOj+Q+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r8si1625324ejc.517.2021.01.27.17.40.29; Wed, 27 Jan 2021 17:40:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=V8QOj+Q+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232301AbhA0UCe (ORCPT + 99 others); Wed, 27 Jan 2021 15:02:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231739AbhA0UBT (ORCPT ); Wed, 27 Jan 2021 15:01:19 -0500 Received: from mail-pg1-x536.google.com (mail-pg1-x536.google.com [IPv6:2607:f8b0:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE06BC061573 for ; Wed, 27 Jan 2021 12:00:29 -0800 (PST) Received: by mail-pg1-x536.google.com with SMTP id c132so2322027pga.3 for ; Wed, 27 Jan 2021 12:00:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yBdA7Nf3DvwxZdzX00Eonq9lYvdJAq2LlEJMLWdaFgQ=; b=V8QOj+Q+1fHQ1H36xr+mUp/WLDS2EcuSMZmc3AhtOrMAlBC08U5jBNgEgdLpDfKk22 jDomIQbrzVEPkpuY4r0FDcuKPa71M2VwQ5mVu56lFvAabiAabf3SFJ30yV20/zie+UtP ThS07AmNNrFpW9WPjRKVsZ+zXRV+dnQZ876CLYA8CzLOTrj/Sh12NQLdOoKN6Da1Moj1 tJlY2axMIQUOOG25y0uKnFzIp9Gz5jBdPvLN4+EzuTihFe220dYgPBKobx+VI0C3eduj FiwkkFxMpNbjAEYGZZFmWoUUbk8p2pE1uzpa5N0nBIzAfjxu8mJJlQwZhk5G196DdQ+g f/Sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yBdA7Nf3DvwxZdzX00Eonq9lYvdJAq2LlEJMLWdaFgQ=; b=sciZ1VcyWGPnwHPWw785nueDQ49cRU20TXXdnJnxt3qaUzZZIjCfBFH3c+3WkBTo7M jPZbHR3+IAsjKCh0H0j6W3RrwkYEb6bpSIr3RfCWaGvzkfmyEeSsqVNftfysIr4RyZE+ gNkn2HBm9DmMgL1pIUhKwI5tSDkmvVQQz85G+cvEl9oxqCEyD9OIGxC3n++qf+v6Czdg fLoeVZRraw7V6eH/aKm5dPMw43yWzE0dbiplmeh6EqXu6kLrKroPMSEcQBO/+cqH5MLt c4hwMYM6k7c47rIXwRZIQA62hZH8boNZHgQdhm9vt9ShNKJsxFq26GHqpN7L0hXG8xjF QEEg== X-Gm-Message-State: AOAM533yWAz4BiguVWs2oDw/RIfTb5PrYetVV+WjWV6jfalaGMDoRwu0 emV7mmEEWOk2/zmGxEaBNS7PsczLaPFd/rIVyHeAiw== X-Received: by 2002:a05:6a00:1:b029:1c1:2d5f:dc16 with SMTP id h1-20020a056a000001b02901c12d5fdc16mr12176024pfk.55.1611777628828; Wed, 27 Jan 2021 12:00:28 -0800 (PST) MIME-Version: 1.0 References: <20210126134603.49759-1-vincenzo.frascino@arm.com> In-Reply-To: <20210126134603.49759-1-vincenzo.frascino@arm.com> From: Andrey Konovalov Date: Wed, 27 Jan 2021 21:00:17 +0100 Message-ID: Subject: Re: [PATCH v9 0/4] arm64: ARMv8.5-A: MTE: Add async mode support To: Vincenzo Frascino , Andrew Morton Cc: Linux ARM , LKML , kasan-dev , Catalin Marinas , Will Deacon , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 26, 2021 at 2:46 PM Vincenzo Frascino wrote: > > This patchset implements the asynchronous mode support for ARMv8.5-A > Memory Tagging Extension (MTE), which is a debugging feature that allows > to detect with the help of the architecture the C and C++ programmatic > memory errors like buffer overflow, use-after-free, use-after-return, etc. > > MTE is built on top of the AArch64 v8.0 virtual address tagging TBI > (Top Byte Ignore) feature and allows a task to set a 4 bit tag on any > subset of its address space that is multiple of a 16 bytes granule. MTE > is based on a lock-key mechanism where the lock is the tag associated to > the physical memory and the key is the tag associated to the virtual > address. > When MTE is enabled and tags are set for ranges of address space of a task, > the PE will compare the tag related to the physical memory with the tag > related to the virtual address (tag check operation). Access to the memory > is granted only if the two tags match. In case of mismatch the PE will raise > an exception. > > The exception can be handled synchronously or asynchronously. When the > asynchronous mode is enabled: > - Upon fault the PE updates the TFSR_EL1 register. > - The kernel detects the change during one of the following: > - Context switching > - Return to user/EL0 > - Kernel entry from EL1 > - Kernel exit to EL1 > - If the register has been updated by the PE the kernel clears it and > reports the error. > > The series is based on linux-next/akpm. > > To simplify the testing a tree with the new patches on top has been made > available at [1]. > > [1] https://git.gitlab.arm.com/linux-arm/linux-vf.git mte/v10.async.akpm > > Cc: Andrew Morton > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Dmitry Vyukov > Cc: Andrey Ryabinin > Cc: Alexander Potapenko > Cc: Marco Elver > Cc: Evgenii Stepanov > Cc: Branislav Rankov > Cc: Andrey Konovalov > Signed-off-by: Vincenzo Frascino Tested-by: Andrey Konovalov > Vincenzo Frascino (4): > arm64: mte: Add asynchronous mode support > kasan: Add KASAN mode kernel parameter > kasan: Add report for async mode > arm64: mte: Enable async tag check fault Andrew, could you pick this up into mm? The whole series will need to go through mm due to dependencies on the patches that are already there.