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From:   "Ardelean, Alexandru" <alexandru.Ardelean@analog.com>
To:     Moritz Fischer <mdf@kernel.org>
CC:     "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "mturquette@baylibre.com" <mturquette@baylibre.com>,
        "sboyd@kernel.org" <sboyd@kernel.org>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "lars@metafoo.de" <lars@metafoo.de>,
        "linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
        "Bogdan, Dragos" <Dragos.Bogdan@analog.com>
Subject: RE: [PATCH v2 1/3] clk: axi-clkgen: remove ARCH dependency in Kconfig
Thread-Topic: [PATCH v2 1/3] clk: axi-clkgen: remove ARCH dependency in
 Kconfig
Thread-Index: AQHW89M2fvkHlXIPW0GheGUW3qYMMao6w3OAgAG+QQA=
Date:   Thu, 28 Jan 2021 05:16:36 +0000
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References: <20210126110826.24221-1-alexandru.ardelean@analog.com>
 <20210126110826.24221-2-alexandru.ardelean@analog.com>
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> -----Original Message-----
> From: Moritz Fischer <mdf@kernel.org>
> Sent: Wednesday, January 27, 2021 4:39 AM
> To: Ardelean, Alexandru <alexandru.Ardelean@analog.com>
> Cc: linux-clk@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; mturquette@baylibre.com; sboyd@kernel.org;
> robh+dt@kernel.org; lars@metafoo.de; linux-fpga@vger.kernel.org;
> mdf@kernel.org; Bogdan, Dragos <Dragos.Bogdan@analog.com>
> Subject: Re: [PATCH v2 1/3] clk: axi-clkgen: remove ARCH dependency in Kc=
onfig
>=20
> Alexandru,
>=20
> On Tue, Jan 26, 2021 at 01:08:24PM +0200, Alexandru Ardelean wrote:
> > The intent is to be able to run this driver to access the IP core in
> > setups where FPGA board is also connected via a PCIe bus. In such
> > cases the number of combinations explodes, where the host system can
> > be an x86 with Xilinx Zynq/ZynqMP/Microblaze board connected via PCIe.
> > Or even a ZynqMP board with a ZynqMP/Zynq/Microblaze connected via PCIe=
.
> >
> > To accommodate for these cases, this change removes the limitation for
> > this driver to be compilable only on Zynq/Microblaze architectures.
> >
> > Signed-off-by: Dragos Bogdan <dragos.bogdan@analog.com>
> > Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
> > ---
> >  drivers/clk/Kconfig | 1 -
> >  1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index
> > 85856cff506c..d8c2d4593926 100644
> > --- a/drivers/clk/Kconfig
> > +++ b/drivers/clk/Kconfig
> > @@ -247,7 +247,6 @@ config CLK_TWL6040
> >
> >  config COMMON_CLK_AXI_CLKGEN
> >  	tristate "AXI clkgen driver"
> > -	depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
> Umhhh ... no dependencies? How are you accessing your registers? You seem=
 to
> be using device tree, probably:
>=20
> 	depends on HAS_IOMEM || COMPILE_TEST
> 	depends on OF
>=20
> at least? Please double check your dependencies.

Agreed.
Will re-spin.
This is a n00b mistake on my part

Thanks

> >  	help
> >  	  Support for the Analog Devices axi-clkgen pcore clock generator for
> Xilinx
> >  	  FPGAs. It is commonly used in Analog Devices' reference designs.
> > --
> > 2.17.1
> >
>=20
> - Moritz