Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp1503932pxb; Thu, 28 Jan 2021 19:49:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJw8l3wb+J6e4CoNDK0PknrgTSztJvLqZrYe+2MeJCJ4cHpctJfYFQ8t3e+LK+mCBP5dfoWB X-Received: by 2002:aa7:db1a:: with SMTP id t26mr3128984eds.25.1611892188957; Thu, 28 Jan 2021 19:49:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611892188; cv=none; d=google.com; s=arc-20160816; b=Lh6WjxIgNnYYIA6l3/potvDkQ5dFd8tr1aHIf0v91OXquux5ZUBaLqhmvsbYbWSHAH uMdaiH7q7mLG5VaGZZuQHKyWpt242iwNlED6XX/eXHdLnt2cYslMzvmbf99GilUnpn7q znkDXglwk+km8dum5BrgaD9vN2us6On1YZ/9wrMh1c1qFMMDZ9rTGtQY5rfeSEqrhHd+ zBYY3qn2O943dDvre5Eki7QpJU6PKdTkiG1Ogt1YdUVjEJ1UmvA0T3Kj4lYMCciCeU4E C1Ke0mqfWpDzGs96bws5LaQH2oP9JCejgiKcjB/CDOyQ79hk10N26EWJBRBSh7d3RoCy iB4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject:dkim-signature; bh=QYx6/uSUyh2hqwQYt//2VWudlIbI5/06ASiZSy/mLyo=; b=jJwFajj2mNRqwZJ1LBow/Vmjgp8fLfaP/bSqfN2jB5mg5ztJIydnKJOE4ROovQF4Jl IQVZn+0cW+VU5f3M95AONlrGlxbRInVLoKpaNDtT7IHMrTWu+j1VF8dxutjaitFKDn0h TMyDjJYtFvE5XOlYtjsdlUItnoABlsFdIo14I1788IPzqWbQAxyjwWFyXd/949ugZS7t JK/FTCgR+FuVYEsYsHnRHPjwp4EctU2HcV5qLb7UQJJcS+zV9auBaQmT8nC8vr3jbPoG 7OCfPWPUF0c1sV/1f84H6C/d3kMYiaG+EKP3IQpzKwGEzHABQSVMqH7JIf1pf/5SpjAJ pb9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MQpAIdc1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z27si4735572edi.351.2021.01.28.19.49.24; Thu, 28 Jan 2021 19:49:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MQpAIdc1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231821AbhA2DqM (ORCPT + 99 others); Thu, 28 Jan 2021 22:46:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231783AbhA2DqF (ORCPT ); Thu, 28 Jan 2021 22:46:05 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C5DDC061574 for ; Thu, 28 Jan 2021 19:45:25 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id v15so5951769ljk.13 for ; Thu, 28 Jan 2021 19:45:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=QYx6/uSUyh2hqwQYt//2VWudlIbI5/06ASiZSy/mLyo=; b=MQpAIdc1jbYRb4uE1UMqpIpEiIdRlXP9v/3iG9ReMEVTIsKFUlysLHvaIEd7HNqYVa QCxw+7t3130iWoa1TG2q9hjKAIbYwnz49quuEwrCfBqLcwbsk6ANb535I/GRxb8uMpIH RHAmEilRZcRxEH9rV/o5hIzRTjOnJX033PWiUUBYjh/sZRHrNdx/+A+J7KfFgJtKuoyH i2uPd9MS354efk26N08RzHGAtL7iusyieL11tcRR1dpNIPHjoVl1X53P9ZjC5TmI7Xzn Rm8prgJGAUAxsQbHTfhGlK1+qIICAXJKhqPD6VaCrPs0xVJxOqh3zo+K/1AV74EDU5b/ OXCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=QYx6/uSUyh2hqwQYt//2VWudlIbI5/06ASiZSy/mLyo=; b=QaerCmya1iFzU9L6kP0QQWuWzilTacUpaAsxdFRvsqC1AaQtfv3Ptw61UmoLuARAOa GwQBNzFFj4h0ne3FddiIXfeLXWEvJjFnq7YqwFP6MOUbWCe2SaN6E82lUrvF7NXqAQ8z FqKDAzlNKzT7wIwHI96gyJcmjvCLBzZLozOsIr1gILm5VmiFZ1KCGLxwzS8qrGTBeWjZ mB82ECKBmPMZvd/aRlH7DUsRykNUBCtjv5ch3A8VET9UMn7bQOBSpH3HRwxf8wAa6ZZS vAUkkxrv0cydg1l1yfKjqLs1SL3AyQWbbpiyRM/azEx4w7dK3FPKrPpgqZGFO6j6rIiw +0CQ== X-Gm-Message-State: AOAM533o6MKmzYc2PkFndm2YsEHxNPhDQiJ7awbUgTIjayc+8sWbS2bw GjsZ7H99Un2dJGtBPDp/0rFfO/B46CIKLY14 X-Received: by 2002:a05:651c:1a3:: with SMTP id c3mr1298160ljn.498.1611891923583; Thu, 28 Jan 2021 19:45:23 -0800 (PST) Received: from [192.168.1.211] ([94.25.229.83]) by smtp.gmail.com with ESMTPSA id a30sm2358345ljq.96.2021.01.28.19.45.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Jan 2021 19:45:23 -0800 (PST) Subject: Re: [PATCH v2 3/5] pcie-qcom: provide a way to power up qca6390 chip on RB5 platform To: Rob Herring Cc: Andy Gross , Bjorn Andersson , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas , linux-arm-msm , Manivannan Sadhasivam , devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" , PCI References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> <20210128175225.3102958-4-dmitry.baryshkov@linaro.org> From: Dmitry Baryshkov Message-ID: Date: Fri, 29 Jan 2021 06:45:21 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/01/2021 22:26, Rob Herring wrote: > On Thu, Jan 28, 2021 at 11:52 AM Dmitry Baryshkov > wrote: >> >> Some Qualcomm platforms require to power up an external device before >> probing the PCI bus. E.g. on RB5 platform the QCA6390 WiFi/BT chip needs >> to be powered up before PCIe0 bus is probed. Add a quirk to the >> respective PCIe root bridge to attach to the power domain if one is >> required, so that the QCA chip is started before scanning the PCIe bus. > > This is solving a generic problem in a specific driver. It needs to be > solved for any PCI host and any device. Ack. I see your point here. As this would require porting code from powerpc/spark of-pci code and changing pcie port driver to apply power supply before bus probing happens, I'd also ask for the comments from PCI maintainers. Will that solution be acceptable to you? > >> Signed-off-by: Dmitry Baryshkov >> --- >> drivers/pci/controller/dwc/pcie-qcom.c | 21 +++++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >> index ab21aa01c95d..eb73c8540d4d 100644 >> --- a/drivers/pci/controller/dwc/pcie-qcom.c >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >> @@ -20,6 +20,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -1568,6 +1569,26 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class); >> DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class); >> DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class); >> >> +static void qcom_fixup_power(struct pci_dev *dev) >> +{ >> + int ret; >> + struct pcie_port *pp = dev->bus->sysdata; >> + struct dw_pcie *pci; >> + >> + if (!pci_is_root_bus(dev->bus)) >> + return; >> + >> + ret = dev_pm_domain_attach(&dev->dev, true); >> + if (ret < 0 || !dev->dev.pm_domain) >> + return; >> + >> + pci = to_dw_pcie_from_pp(pp); >> + dev_info(&dev->dev, "Bus powered up, waiting for link to come up\n"); >> + >> + dw_pcie_wait_for_link(pci); >> +} >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x010b, qcom_fixup_power); >> + >> static struct platform_driver qcom_pcie_driver = { >> .probe = qcom_pcie_probe, >> .driver = { >> -- >> 2.29.2 >> -- With best wishes Dmitry