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[23.128.96.18]) by mx.google.com with ESMTP id v1si958581edb.592.2021.01.30.08.19.59; Sat, 30 Jan 2021 08:20:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aK4pYBjP; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232223AbhA3QSC (ORCPT + 99 others); Sat, 30 Jan 2021 11:18:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232216AbhA3QPq (ORCPT ); Sat, 30 Jan 2021 11:15:46 -0500 Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26D33C061788 for ; Sat, 30 Jan 2021 08:14:52 -0800 (PST) Received: by mail-qk1-x72f.google.com with SMTP id l27so11900729qki.9 for ; Sat, 30 Jan 2021 08:14:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ZW9/30ZgBdjsQF6ELbAndLfZM5KKodhdtFyYrqkzGHo=; b=aK4pYBjPylxJwoy9KBdrEeHpbtFm4YSFEZu2cql7L3iZT9UP9Ooj8Ds95rVv8HbRPn ZN+sQRolh7iN7/vu7L45CCzoPgV6z1NN/fwRD3jgLKUxnpGz9yJBTC0DChSsPT0ISsCA 4JVsnuGavXGPZb74fGnZHQP98fguwcCGlS0uNzr66QQekDwazpeNs397kcqQT1Uw27Z9 77WIYxnEI5gBgg1Yfhv72YgM7wewytpWawXpsGd7yG/LcEj95Tx4ny/6AgOj3zQaLPap jZ4hROph4FxAx/pThCzrfqfhVhqQp/N9uwXLcKvcqwLig7SoMv7hIGdCDY52azJAx7Ty uzYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ZW9/30ZgBdjsQF6ELbAndLfZM5KKodhdtFyYrqkzGHo=; b=sPvw7L8e5xUi5CMtFEJ5F3qz3lbccaEV1w2mXs/1CsXG9+VLLSIUT4EL/M7f8Ji/vB Wsupk0IljCkUZZzm3yWWwHb9uXxD4nfXQ5S8UgEsLPrDKp8ewFHShZGJdt4M//pt+Jqn Sd7haUbTpKybBD1MWHRdiWFhbP7zgvM+N00YJQDReknqMXmatbjnaKXfbWHWWWCKVtkw dGrM3CLpfMVSJgvRmtrAD+6u4F5j7jPbJwMw3avz8H67T9nnEoNlwRbJ3//N/q83+qex euvzCnFwZZnxBuKr+BFIW+ZyGS2FDe3pA5Hm1UBiLqDEi8fn+Um3xH4T9UsDclsQel+F RjdA== X-Gm-Message-State: AOAM5320ixb0GVpSPrVprJY1em311w9Dy8KoyjBiKmNWyZ7FM3jVAkio uWTzwtm4UFYWXkYcTuPujOf0kGlEzvNZk6zfcQaw7A== X-Received: by 2002:a37:af46:: with SMTP id y67mr8534573qke.434.1612023291329; Sat, 30 Jan 2021 08:14:51 -0800 (PST) MIME-Version: 1.0 References: <20210129215024.GA113900@bjorn-Precision-5520> In-Reply-To: From: Dmitry Baryshkov Date: Sat, 30 Jan 2021 19:14:40 +0300 Message-ID: Subject: Re: [PATCH v2 3/5] pcie-qcom: provide a way to power up qca6390 chip on RB5 platform To: Bjorn Andersson Cc: Bjorn Helgaas , Rob Herring , Andy Gross , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas , linux-arm-msm , Manivannan Sadhasivam , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "linux-kernel@vger.kernel.org" , PCI Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 30 Jan 2021 at 06:53, Bjorn Andersson wrote: > > On Fri 29 Jan 16:19 CST 2021, Dmitry Baryshkov wrote: > > > On Sat, 30 Jan 2021 at 00:50, Bjorn Helgaas wrote: > > > > > > On Fri, Jan 29, 2021 at 06:45:21AM +0300, Dmitry Baryshkov wrote: > > > > On 28/01/2021 22:26, Rob Herring wrote: > > > > > On Thu, Jan 28, 2021 at 11:52 AM Dmitry Baryshkov > > > > > wrote: > > > > > > > > > > > > Some Qualcomm platforms require to power up an external device before > > > > > > probing the PCI bus. E.g. on RB5 platform the QCA6390 WiFi/BT chip needs > > > > > > to be powered up before PCIe0 bus is probed. Add a quirk to the > > > > > > respective PCIe root bridge to attach to the power domain if one is > > > > > > required, so that the QCA chip is started before scanning the PCIe bus. > > > > > > > > > > This is solving a generic problem in a specific driver. It needs to be > > > > > solved for any PCI host and any device. > > > > > > > > Ack. I see your point here. > > > > > > > > As this would require porting code from powerpc/spark of-pci code and > > > > changing pcie port driver to apply power supply before bus probing happens, > > > > I'd also ask for the comments from PCI maintainers. Will that solution be > > > > acceptable to you? > > > > > > I can't say without seeing the code. I don't know enough about this > > > scenario to envision how it might look. > > > > > > I guess the QCA6390 is a PCIe device? Why does it need to be powered > > > up before probing? Shouldn't we get a link-up interrupt when it is > > > powered up so we could probe it then? > > > > Not quite. QCA6390 is a multifunction device, with PCIe and serial > > parts. It has internal power regulators which once enabled will > > powerup the PCIe, serial and radio parts. There is no need to manage > > regulators. Once enabled they will automatically handle device > > suspend/resume, etc. > > > > So what you're saying is that if either the PCI controller or bluetooth > driver probes these regulators will be turned on, indefinitely? > > If so, why do we need a driver to turn them on, rather than just mark > them as always-on? > > What's the timing requirement wrt regulators vs WL_EN/BT_EN? According to the documentation I have, they must be enabled right after enabling powering the chip and they must stay enabled all the time. -- With best wishes Dmitry