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Subject: Re: [PATCH 2/2] soc: mediatek: pm-domains: Add domain_supply cap for
 mfg_async PD
To:     Bilal Wasim <bilalwasim676@gmail.com>,
        linux-mediatek@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        enric.balletbo@collabora.com, hsinyi@chromium.org,
        weiyi.lu@mediatek.com
References: <20210201054542.1470695-1-Bilal.Wasim@imgtec.com>
 <20210201054542.1470695-3-Bilal.Wasim@imgtec.com>
From:   Matthias Brugger <matthias.bgg@gmail.com>
Message-ID: <e5c7352b-58db-760b-120c-090f225768b2@gmail.com>
Date:   Mon, 1 Feb 2021 10:14:00 +0100
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On 01/02/2021 06:45, Bilal Wasim wrote:
> The mfg_async power domain in mt8173 is used to power up imgtec
> gpu. This domain requires the da9211 regulator to be enabled before
> the power domain can be enabled successfully.
> 
> Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com>
> ---
>  drivers/soc/mediatek/mt8173-pm-domains.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
> index 3e8ee5dabb43..065b8195e7d6 100644
> --- a/drivers/soc/mediatek/mt8173-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8173-pm-domains.h
> @@ -63,6 +63,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
>  		.ctl_offs = SPM_MFG_ASYNC_PWR_CON,
>  		.sram_pdn_bits = GENMASK(11, 8),
>  		.sram_pdn_ack_bits = 0,
> +		.caps = MTK_SCPD_DOMAIN_SUPPLY,
>  	},
>  	[MT8173_POWER_DOMAIN_MFG_2D] = {
>  		.sta_mask = PWR_STATUS_MFG_2D,
> 

We are missing a third patch for the DTS to actually add the regulator. Please
provide them for both, mt8173-evb.dts and mt8173-elm.dts

Thanks a lot and I'm very happy to see you starting to contribute!

Regards,
Matthias