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[23.128.96.18]) by mx.google.com with ESMTP id l13si964518ejx.754.2021.02.01.12.04.52; Mon, 01 Feb 2021 12:05:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="APLRnJ/Q"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232604AbhBAUDw (ORCPT + 99 others); Mon, 1 Feb 2021 15:03:52 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:42036 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232471AbhBAUBX (ORCPT ); Mon, 1 Feb 2021 15:01:23 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 111JxYsS024167; Mon, 1 Feb 2021 13:59:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1612209574; bh=EuXUXQ2MK6XQb++j+zAUk27hVnYjozn7DI26CkPIRjg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=APLRnJ/QuDOWBgauX5WVDcol4+ZshQodlUKUDT+V5iP+Gkxej6IfXe5ofvkV1PObO tvED/SdXZwukd0h0MZFYdOsCP9lsNkk0nx7q6hFonZSKQZkRswj/7ksxsVLvXn3K5H rZkLrc5T/4BzqgCPGEu0nuH+k4SsQST+rR6Qmx0o= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 111JxYU4102086 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 1 Feb 2021 13:59:34 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 1 Feb 2021 13:59:34 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 1 Feb 2021 13:59:34 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 111JwAQl085814; Mon, 1 Feb 2021 13:59:29 -0600 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Jonathan Corbet , Kishon Vijay Abraham I , Lorenzo Pieralisi , Arnd Bergmann , Jon Mason , Dave Jiang , Allen Hubbe , Tom Joseph , Rob Herring CC: Greg Kroah-Hartman , , , , Subject: [PATCH v11 14/17] PCI: Add TI J721E device to pci ids Date: Tue, 2 Feb 2021 01:28:06 +0530 Message-ID: <20210201195809.7342-15-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210201195809.7342-1-kishon@ti.com> References: <20210201195809.7342-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add TI J721E device to the pci id database. Since this device has a configurable PCIe endpoint, it could be used with different drivers. Signed-off-by: Kishon Vijay Abraham I --- drivers/misc/pci_endpoint_test.c | 1 - include/linux/pci_ids.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index eff481ce08ee..1b2868ca4f2a 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -68,7 +68,6 @@ #define PCI_ENDPOINT_TEST_FLAGS 0x2c #define FLAG_USE_DMA BIT(0) -#define PCI_DEVICE_ID_TI_J721E 0xb00d #define PCI_DEVICE_ID_TI_AM654 0xb00c #define PCI_DEVICE_ID_LS1088A 0x80c0 diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index d8156a5dbee8..f968fcda338e 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -881,6 +881,7 @@ #define PCI_DEVICE_ID_TI_X620 0xac8d #define PCI_DEVICE_ID_TI_X420 0xac8e #define PCI_DEVICE_ID_TI_XX20_FM 0xac8f +#define PCI_DEVICE_ID_TI_J721E 0xb00d #define PCI_DEVICE_ID_TI_DRA74x 0xb500 #define PCI_DEVICE_ID_TI_DRA72x 0xb501 -- 2.17.1