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Date:   Tue, 2 Feb 2021 09:59:47 +0800
From:   Xu Yilun <yilun.xu@intel.com>
To:     "Wu, Hao" <hao.wu@intel.com>
Cc:     "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "mdf@kernel.org" <mdf@kernel.org>,
        "linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "trix@redhat.com" <trix@redhat.com>,
        "lgoncalv@redhat.com" <lgoncalv@redhat.com>
Subject: Re: [PATCH v10 2/2] Documentation: fpga: dfl: Add description for
 DFL  UIO support
Message-ID: <20210202015947.GA18237@yilunxu-OptiPlex-7050>
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On Mon, Feb 01, 2021 at 08:59:06PM +0800, Wu, Hao wrote:
> > Subject: [PATCH v10 2/2] Documentation: fpga: dfl: Add description for DFL UIO
> > support
> >
> > This patch adds description for UIO support for dfl devices on DFL
> > bus.
> >
> > Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> > Reviewed-by: Tom Rix <trix@redhat.com>
> > ---
> > v2: no doc in v1, add it for v2.
> > v3: some documentation fixes.
> > v4: documentation change since the driver matching is changed.
> > v5: no change.
> > v6: improve the title of the userspace driver support section.
> >     some word improvement.
> > v7: rebased to next-20210119
> > v8: some doc fixes.
> > v9: some doc change since we switch to the driver in drivers/uio.
> > v10: no change.
> > ---
> >  Documentation/fpga/dfl.rst | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> > index c41ac76..e35cf87 100644
> > --- a/Documentation/fpga/dfl.rst
> > +++ b/Documentation/fpga/dfl.rst
> > @@ -7,6 +7,7 @@ Authors:
> >  - Enno Luebbers <enno.luebbers@intel.com>
> >  - Xiao Guangrong <guangrong.xiao@linux.intel.com>
> >  - Wu Hao <hao.wu@intel.com>
> > +- Xu Yilun <yilun.xu@intel.com>
> >
> >  The Device Feature List (DFL) FPGA framework (and drivers according to
> >  this framework) hides the very details of low layer hardwares and provides
> > @@ -530,6 +531,28 @@ Being able to specify more than one DFL per BAR has
> > been considered, but it
> >  was determined the use case did not provide value.  Specifying a single DFL
> >  per BAR simplifies the implementation and allows for extra error checking.
> >
> > +
> > +Userspace driver support for DFL devices
> > +========================================
> > +The purpose of an FPGA is to be reprogrammed with newly developed
> > hardware
> > +components. New hardware can instantiate a new private feature in the DFL,
> > and
> > +then present a DFL device in the system. In some cases users may need a
> > +userspace driver for the DFL device:
> > +
> > +* Users may need to run some diagnostic test for their hardware.
> > +* Users may prototype the kernel driver in user space.
> > +* Some hardware is designed for specific purposes and does not fit into one of
> > +  the standard kernel subsystems.
> > +
> > +This requires direct access to MMIO space and interrupt handling from
> > +userspace. The uio_dfl module exposes the UIO device interfaces for this
> > +purpose.
> 
> Current uio_dfl doesn't have interrupt handling support, right? I guess we need
> to make sure no confusion on the description here. other place looks good to me.

Will fix it.

Thanks,
Yilun