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[209.85.221.170]) by smtp.gmail.com with ESMTPSA id l17sm2698405uan.6.2021.02.01.23.56.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 01 Feb 2021 23:56:03 -0800 (PST) Received: by mail-vk1-f170.google.com with SMTP id y8so4590090vky.4; Mon, 01 Feb 2021 23:56:02 -0800 (PST) X-Received: by 2002:a1f:f447:: with SMTP id s68mr11402654vkh.17.1612252562184; Mon, 01 Feb 2021 23:56:02 -0800 (PST) MIME-Version: 1.0 References: <20210127172500.13356-1-andre.przywara@arm.com> <20210127172500.13356-5-andre.przywara@arm.com> In-Reply-To: <20210127172500.13356-5-andre.przywara@arm.com> From: Chen-Yu Tsai Date: Tue, 2 Feb 2021 15:55:50 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH v5 04/20] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) To: =?UTF-8?Q?Andr=C3=A9_Przywara?= Cc: Maxime Ripard , Jernej Skrabec , Samuel Holland , Icenowy Zheng , Rob Herring , =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= , Shuosheng Huang , Yangtao Li , linux-arm-kernel , linux-kernel , linux-sunxi , Lee Jones , devicetree Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Jan 28, 2021 at 1:26 AM Andre Przywara wrote: > > The AXP305 PMIC used in AXP805 seems to be fully compatible to the ^ This statement doesn't quite make sense. I assume you wanted to mention a board or the H616 SoC here? > AXP805 PMIC, so add the proper chain of compatible strings. > > Also at least on one board (Orangepi Zero2) there is no interrupt line > connected to the CPU, so make the "interrupts" property optional. > > Signed-off-by: Andre Przywara > --- > Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt > index 4991a6415796..4fd748101e3c 100644 > --- a/Documentation/devicetree/bindings/mfd/axp20x.txt > +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt > @@ -26,10 +26,10 @@ Required properties: > * "x-powers,axp803" > * "x-powers,axp806" > * "x-powers,axp805", "x-powers,axp806" > + * "x-powers,axp803", "x-powers,axp805", "x-powers,axp806" axp305? axp803 is used with A64 IIRC. ChenYu > * "x-powers,axp809" > * "x-powers,axp813" > - reg: The I2C slave address or RSB hardware address for the AXP chip > -- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin > - interrupt-controller: The PMIC has its own internal IRQs > - #interrupt-cells: Should be set to 1 > > @@ -43,6 +43,7 @@ more information: > AXP20x/LDO3: software-based implementation > > Optional properties: > +- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin > - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz > AXP152/20X: range: 750-1875, Default: 1.5 MHz > AXP22X/8XX: range: 1800-4050, Default: 3 MHz > -- > 2.17.5 > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com. > To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20210127172500.13356-5-andre.przywara%40arm.com.