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[23.128.96.18]) by mx.google.com with ESMTP id rk25si5723827ejb.552.2021.02.02.00.28.38; Tue, 02 Feb 2021 00:29:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b=SzRuIuAR; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231968AbhBBIS3 (ORCPT + 99 others); Tue, 2 Feb 2021 03:18:29 -0500 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:40228 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230430AbhBBISO (ORCPT ); Tue, 2 Feb 2021 03:18:14 -0500 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1128BJFY009909; Tue, 2 Feb 2021 00:17:23 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=OoXwOnHWd0GaVx0sTAIBGHb9igdf2sD7e9mI0hp+01I=; b=SzRuIuARksNUuZwCOSpTQNLzs9NsNcaJshk6eJCy1rNNl06iTjPBHuKbHeknT0YnATjo rM17doUCVjTIY1bKTjWhMouE9gwbD3PTQ45AA7VV4T3K1zGmo+BOm54qSJHzwaN/Qbk3 +nN+4qXb/OupJi+vwIpdc/7kiFtPer1E7+9dGS0XOzA/o1a/dr5YIpjK48Qe9YIDhRqu uExEIK7vVRLugWIuu4CFJuSn2Fc1ssl2xRXLrz/85MZykFVy57gnB4QG8u0kvG13lEAW VaY+2waxbEvm/KdKjoEQF0q0OIqDOcfB3nSAqMxeJ9TLa6GNfogmjTKny94E48VNPbuz Qg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 36d7uq6e71-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 02 Feb 2021 00:17:22 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 2 Feb 2021 00:17:20 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 2 Feb 2021 00:17:20 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 2 Feb 2021 00:17:20 -0800 Received: from stefan-pc.marvell.com (stefan-pc.marvell.com [10.5.25.21]) by maili.marvell.com (Postfix) with ESMTP id A72223F703F; Tue, 2 Feb 2021 00:17:17 -0800 (PST) From: To: CC: , , , , , , , , , , , Subject: [PATCH v7 net-next 01/15] doc: marvell: add cm3-mem and PPv2.3 description Date: Tue, 2 Feb 2021 10:16:47 +0200 Message-ID: <1612253821-1148-2-git-send-email-stefanc@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1612253821-1148-1-git-send-email-stefanc@marvell.com> References: <1612253821-1148-1-git-send-email-stefanc@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-02-02_04:2021-01-29,2021-02-02 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Chulski Patch introduce cm3-mem device tree bindings and add PPv2.3 description. Signed-off-by: Stefan Chulski --- Documentation/devicetree/bindings/net/marvell-pp2.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt index b783976..df80cff 100644 --- a/Documentation/devicetree/bindings/net/marvell-pp2.txt +++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt @@ -1,5 +1,6 @@ * Marvell Armada 375 Ethernet Controller (PPv2.1) Marvell Armada 7K/8K Ethernet Controller (PPv2.2) + Marvell CN913X Ethernet Controller (PPv2.3) Required properties: @@ -12,7 +13,7 @@ Required properties: - common controller registers - LMS registers - one register area per Ethernet port - For "marvell,armada-7k-pp2", must contain the following register + For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register sets: - packet processor registers - networking interfaces registers @@ -37,6 +38,7 @@ Required properties (port): GOP (Group Of Ports) point of view. This ID is used to index the per-port registers in the second register area. - phy-mode: See ethernet.txt file in the same directory +- cm3-mem: phandle to CM3 SRAM definitions Optional properties (port): -- 1.9.1