Received: by 2002:a05:6a10:8c0a:0:0:0:0 with SMTP id go10csp716800pxb; Tue, 2 Feb 2021 16:31:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJymZysfkoosBnIFfAMhkFxbI+Pn0YjM5XglC6n7sVupIAv5vaHIVKSwBM6P05lyxsNMyGhE X-Received: by 2002:a17:906:7b8d:: with SMTP id s13mr533157ejo.479.1612312317349; Tue, 02 Feb 2021 16:31:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1612312317; cv=none; d=google.com; s=arc-20160816; b=CSykI8j6kbClBeoGibGpRLrtZgTCHPUOeQQkBVlY+E+AMCMWl6qV+wqT2f3SMUxOeY 0nzaRbtw3kCaPuUHiCkODUQjek9yS0lDfgtkAuxPR7u0Lzu0Q5ekeQAGZcrNCjo2TdfS a9r4oaHcj+/+JQbTnSdHCbOi7bFdpAzq/hPGUky5vYK+fmO5eRjkA/X/N/fdK2JDTg2c +YA7f/pU6rk2Mt1n2HDid9u7xJGDQWqDqhlkZJDxDV7zKJ84djw3b2D9VZCDCTO37pMC GHVQLRqsFAjSnm2Q14mbVEwHTnXgaOQmVkagG7/lRpffBh0Wdm2opUDZaVv0jX7m+g9s qZGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=/mTlWkcVL76UF9o+OsR/tO3YoWHaganA50y4/1z+zgM=; b=0bXl8Tuwr6WiolauF3g6BlH5NDyvmpcgrP7pOJYk6ZhZc4udZ352NrIbDaG/PdNkO2 5RfVOn2jUt8MdEGA4vMXrmhQ+y9/wJIw8rzNbZ9mbPNGPTgVabFuDWk89OfdwJ9djBNm wer1FbONMgKO0CCENuxV1oEEHC2KTIpb7U4YkOqlHJj2L1NRjBbVhordpvSvDFQUQ18W qGnGWVYeXQcoFpdYRWeIgJEoYGI0mpvbwcqmHEG90lk1+3Yj+rmuxX9p/Zcnk8aeDJc0 iQ5OYq/bCKRc5n8ZDo1DphtnFVU68mOpgSP02aRp83u2TEzoHcdWDTAuEG2OZ7SoT0+b YNEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v4si275124edj.37.2021.02.02.16.31.32; Tue, 02 Feb 2021 16:31:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238031AbhBBSFP (ORCPT + 99 others); Tue, 2 Feb 2021 13:05:15 -0500 Received: from foss.arm.com ([217.140.110.172]:54812 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233934AbhBBSDK (ORCPT ); Tue, 2 Feb 2021 13:03:10 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F2F92ED1; Tue, 2 Feb 2021 10:02:22 -0800 (PST) Received: from [10.57.49.26] (unknown [10.57.49.26]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5CCAC3F73B; Tue, 2 Feb 2021 10:02:21 -0800 (PST) Subject: Re: [PATCH 2/2] iommu: add Unisoc iommu basic driver To: Joerg Roedel Cc: Chunyan Zhang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chunyan Zhang , Sheng Xu , iommu@lists.linux-foundation.org, Rob Herring , Baolin Wang , Orson Zhai References: <20210202073258.559443-3-zhang.lyra@gmail.com> <20210202104257.736836-1-zhang.lyra@gmail.com> <20210202140101.GA32671@8bytes.org> <992fad43-c457-d809-3bd7-7fd5b6e8fa22@arm.com> <20210202144126.GC32671@8bytes.org> From: Robin Murphy Message-ID: <5e766b74-ab51-8c47-66c1-ca65bc5743cd@arm.com> Date: Tue, 2 Feb 2021 18:02:15 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <20210202144126.GC32671@8bytes.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-02-02 14:41, Joerg Roedel wrote: > On Tue, Feb 02, 2021 at 02:34:34PM +0000, Robin Murphy wrote: >> Nope, I believe if Arm Ltd. had any involvement in this I'd know about it :) > > Okay, got confused by thinking of ARM as the CPU architecture, not the > company :) > But given the intel/ and amd/ subdirectories refer to company names as > well, the same is true for arm/. Right, trying to group IOMMU drivers by supposed CPU architecture is already a demonstrable non-starter; does intel-iommu count as x86, or IA-64, or do you want two copies? :P I somehow doubt anyone would license one of Arm's SMMUs to go in a RISC-V/MIPS/etc. based SoC, but in principle, they *could*. In fact it's precisely cases like this one - where silicon vendors come up with their own little scatter-gather unit to go with their own display controller etc. - that I imagine are most likely to get reused if the vendor decides to experiment with different CPUs to reach new market segments. Robin.