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References: <20210128153601.153126-1-alban.bedel@aerq.com>
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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Wed, 3 Feb 2021 12:10:01 +0200
Message-ID: <CAHp75Ve5t4_ocv0YMsPP2+nnuXvMj74yjhVF01ROGCELxXKGSw@mail.gmail.com>
Subject: Re: [PATCH] gpio: pca953x: add support for open drain pins on PCAL6524
To:     Alban Bedel <alban.bedel@aerq.com>
Cc:     Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <bgolaszewski@baylibre.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Thu, Jan 28, 2021 at 5:38 PM Alban Bedel <alban.bedel@aerq.com> wrote:
>
> From a quick glance at various datasheet the PCAL6524 seems to be the
> only chip in this familly that support setting the drive mode of

chips
family

> single pins. Other chips either don't support it at all, or can only
> set the drive mode of whole banks, which doesn't map to the GPIO API.
>
> Add a new flag, PCAL6524, to mark chips that have the extra registers
> needed for this feature. Then mark the needed register banks as
> readable and writable, here we don't set OUT_CONF as writable,
> although it is, as we only need to read it. Finally add a function
> that configure the OUT_INDCONF register when the GPIO API set the

configures
sets

> drive mode of the pins.

Can we actually convert the driver to be a pin control for the starter?
Or split it for some chips to be a pin control, while the rest keeps
just being GPIO.
I would like to avoid more complex changes in it until it's properly
converted to the pin control.

-- 
With Best Regards,
Andy Shevchenko