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[23.128.96.18]) by mx.google.com with ESMTP id r25si1511581edc.257.2021.02.03.06.07.43; Wed, 03 Feb 2021 06:08:27 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232490AbhBCOCW (ORCPT + 99 others); Wed, 3 Feb 2021 09:02:22 -0500 Received: from mga11.intel.com ([192.55.52.93]:52285 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232521AbhBCOBu (ORCPT ); Wed, 3 Feb 2021 09:01:50 -0500 IronPort-SDR: hgOSmrWzdpji+fqzFNyvuG3cGQZG8mRWiVxDrgBb3j0n0L7d6ZAnnKuAKkI8q8w1Zpv8e+Lw5G K3zIOQx7yurg== X-IronPort-AV: E=McAfee;i="6000,8403,9883"; a="177535209" X-IronPort-AV: E=Sophos;i="5.79,398,1602572400"; d="scan'208";a="177535209" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 05:58:43 -0800 IronPort-SDR: Go2XKtg4DfF94G/jQk598CbAM5NKoHrf+Of7BEEvU4/HYgpGUB0RhKrXB+zWPGz9PahxKzW/tf x196GwmHH+fQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,398,1602572400"; d="scan'208";a="406659086" Received: from nntpdsd52-183.inn.intel.com ([10.125.52.183]) by fmsmga004.fm.intel.com with ESMTP; 03 Feb 2021 05:58:40 -0800 From: Alexander Antonov To: acme@kernel.org Cc: linux-kernel@vger.kernel.org, jolsa@redhat.com, ak@linux.intel.com, alexander.shishkin@linux.intel.com, mark.rutland@arm.com, namhyung@kernel.org, irogers@google.com, mingo@redhat.com, peterz@infradead.org, alexander.antonov@linux.intel.com Subject: [PATCH v4 3/5] perf stat: Helper functions for PCIe root ports list in iostat mode Date: Wed, 3 Feb 2021 16:58:28 +0300 Message-Id: <20210203135830.38568-4-alexander.antonov@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20210203135830.38568-1-alexander.antonov@linux.intel.com> References: <20210203135830.38568-1-alexander.antonov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce helper functions to control PCIe root ports list. These helpers will be used in the follow-up patch. Signed-off-by: Alexander Antonov --- tools/perf/arch/x86/util/iostat.c | 124 ++++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 tools/perf/arch/x86/util/iostat.c diff --git a/tools/perf/arch/x86/util/iostat.c b/tools/perf/arch/x86/util/iostat.c new file mode 100644 index 000000000000..961e540106e6 --- /dev/null +++ b/tools/perf/arch/x86/util/iostat.c @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * perf iostat + * + * Copyright (C) 2020, Intel Corporation + * + * Authors: Alexander Antonov + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "util/cpumap.h" +#include "util/debug.h" +#include "util/iostat.h" +#include "util/counts.h" +#include "path.h" + +struct iio_root_port { + u32 domain; + u8 bus; + u8 die; + u8 pmu_idx; + int idx; +}; + +struct iio_root_ports_list { + struct iio_root_port **rps; + int nr_entries; +}; + +static void iio_root_port_show(FILE *output, + const struct iio_root_port * const rp) +{ + if (output && rp) + fprintf(output, "S%d-uncore_iio_%d<%04x:%02x>\n", + rp->die, rp->pmu_idx, rp->domain, rp->bus); +} + +static struct iio_root_port *iio_root_port_new(u32 domain, u8 bus, + u8 die, u8 pmu_idx) +{ + struct iio_root_port *p = calloc(1, sizeof(*p)); + + if (p) { + p->domain = domain; + p->bus = bus; + p->die = die; + p->pmu_idx = pmu_idx; + } + return p; +} + +static struct iio_root_ports_list *iio_root_ports_list_new(void) +{ + struct iio_root_ports_list *list = calloc(1, sizeof(*list)); + + if (list) { + list->rps = calloc(1, sizeof(struct iio_root_port *)); + if (!list->rps) { + free(list); + list = NULL; + } + } + return list; +} + +static void iio_root_ports_list_free(struct iio_root_ports_list *list) +{ + int idx; + + if (list) { + for (idx = 0; idx < list->nr_entries; idx++) + free(list->rps[idx]); + free(list->rps); + free(list); + } +} + +static struct iio_root_port *iio_root_port_find_by_notation( + const struct iio_root_ports_list * const list, u32 domain, u8 bus) +{ + int idx; + struct iio_root_port *rp; + + if (list) { + for (idx = 0; idx < list->nr_entries; idx++) { + rp = list->rps[idx]; + if (rp && rp->domain == domain && rp->bus == bus) + return rp; + } + } + return NULL; +} + +static int iio_root_ports_list_insert(struct iio_root_ports_list *list, + struct iio_root_port * const rp) +{ + struct iio_root_port **tmp_buf; + + if (list && rp) { + rp->idx = list->nr_entries++; + tmp_buf = realloc(list->rps, + list->nr_entries * sizeof(*list->rps)); + if (!tmp_buf) { + pr_err("Failed to realloc memory\n"); + return -ENOMEM; + } + tmp_buf[rp->idx] = rp; + list->rps = tmp_buf; + } + return 0; +} -- 2.19.1