Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates
 149.199.62.198 as permitted sender) receiver=protection.outlook.com;
 client-ip=149.199.62.198; helo=xsj-pvapexch01.xlnx.xilinx.com;
Envelope-to: git@xilinx.com,
 michal.simek@xilinx.com,
 linux-arm-kernel@lists.infradead.org,
 devicetree@vger.kernel.org,
 andre.przywara@arm.com,
 monstr@monstr.eu,
 linux-kernel@vger.kernel.org,
 robh+dt@kernel.org
Subject: Re: [PATCH] ARM: dts: zynq: Add address-cells property to interrupt
 controllers
To:     Rob Herring <robh+dt@kernel.org>,
        Michal Simek <michal.simek@xilinx.com>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Michal Simek" <monstr@monstr.eu>, git <git@xilinx.com>,
        Andre Przywara <andre.przywara@arm.com>,
        <devicetree@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
References: <91e3405245c89f134676449cf3822285798d2ed2.1612189652.git.michal.simek@xilinx.com>
 <CAL_JsqJnu1M6ut8g_36ve-OG22jFsySHbmVHOgtDRhc-s37rpQ@mail.gmail.com>
 <210b0e5a-767b-c285-62e2-23de19bd3cf1@xilinx.com>
 <CAL_Jsq+m7F+nD6VKd2L5i44hz32_-6iX3toZ0A0CBT-g7Xqu9g@mail.gmail.com>
From:   Michal Simek <michal.simek@xilinx.com>
Message-ID: <a2f10400-51e5-bb76-f5c4-3b8e2fbc2793@xilinx.com>
Date:   Wed, 3 Feb 2021 15:15:19 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.7.0
MIME-Version: 1.0
In-Reply-To: <CAL_Jsq+m7F+nD6VKd2L5i44hz32_-6iX3toZ0A0CBT-g7Xqu9g@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Content-Language: en-US
Content-Transfer-Encoding: 7bit
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2021 14:15:45.6573
 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 1aab851e-4308-4610-ff4a-08d8c84e32bf
X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com]
X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT043.eop-nam02.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB4053
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


On 2/3/21 3:12 PM, Rob Herring wrote:
> On Wed, Feb 3, 2021 at 1:01 AM Michal Simek <michal.simek@xilinx.com> wrote:
>>
>>
>>
>> On 2/1/21 6:41 PM, Rob Herring wrote:
>>> On Mon, Feb 1, 2021 at 8:27 AM Michal Simek <michal.simek@xilinx.com> wrote:
>>>>
>>>> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version
>>>> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC
>>>> commit
>>>> "81e0919a3e21 checks: Add interrupt provider test"
>>>> where reasons for this checking are mentioned as
>>>> "A missing #address-cells property is less critical, but creates
>>>> ambiguities when used in interrupt-map properties, so warn about this as
>>>> well now."
>>>>
>>>> Add address-cells property to gic and gpio nodes to get rid of this warning.
>>>> The similar change has been done for ZynqMP too.
>>>
>>> FYI, we're going to make this check dependent on having an
>>> interrupt-map property. So adding these isn't necessary.
>>
>> Good to know. Is there going to be report if interrupt-map doesn't
>> exist? Which can end up with reverting these changes?
> 
> You mean a warning if '#address-cells' is present and interrupt-map is
> not? No, that would cause lots of warnings.

yep. What's the timeline for this? I mean I want to get to state that
all current warnings are gone that it will be much easier to add stuff
which we have in soc tree.

Thanks,
Michal