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From:   Kostya Porotchkin <kostap@marvell.com>
To:     Baruch Siach <baruch@tkos.co.il>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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        "linux@armlinux.org.uk" <linux@armlinux.org.uk>,
        Nadav Haklai <nadavh@marvell.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
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        <linux-arm-kernel@lists.infradead.org>
Subject: RE: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings
Thread-Topic: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
 settings
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Date:   Wed, 3 Feb 2021 14:37:22 +0000
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 <20210203133138.10754-3-kostap@marvell.com> <87h7mtckxe.fsf@tarshish>
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Hi, Baruch,

> -----Original Message-----
> From: Baruch Siach <baruch@tkos.co.il>
> Sent: Wednesday, February 3, 2021 15:59
> To: Kostya Porotchkin <kostap@marvell.com>
> Cc: linux-kernel@vger.kernel.org; devicetree@vger.kernel.org;
> andrew@lunn.ch; jaz@semihalf.com; gregory.clement@bootlin.com;
> linux@armlinux.org.uk; Nadav Haklai <nadavh@marvell.com>;
> robh+dt@kernel.org; Stefan Chulski <stefanc@marvell.com>;
> mw@semihalf.com; Ben Peled <bpeled@marvell.com>;
> sebastian.hesselbarth@gmail.com; linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> settings
>=20
> External Email
>=20
> ----------------------------------------------------------------------
> Hi Konstantin,
>=20
> On Wed, Feb 03 2021, kostap@marvell.com wrote:
> > From: Konstantin Porotchkin <kostap@marvell.com>
> >
> > Update the settings for AP806 SDHCI interface according to latest
> > Xenon drivers changes.
> > - no need to select the PHY slow mode anymore
>=20
> Why? Has anything changed since the introduction of marvell,xenon-phy-slo=
w-
> mode?
[KP] AP806 B0, AP807 and later do not need the "slow mode" set by the defau=
lt.
The HWE-7296210 errata is not applicable to these components and they are a=
ble=20
to run  AP SDHCI in HS400 8-bit mode.

Kosta
>=20
> baruch
>=20
> > -	 * Not stable in HS modes - phy needs "more calibration", so add
> > -	 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
> > -	 */
> > -	marvell,xenon-phy-slow-mode;
> >  	no-1-8-v;
> >  	no-sd;
> >  	no-sdio;
> > diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > index 12e477f1aeb9..edd6131a0587 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > @@ -257,7 +257,6 @@
> >  				clock-names =3D "core";
> >  				clocks =3D <&ap_clk 4>;
> >  				dma-coherent;
> > -				marvell,xenon-phy-slow-mode;
> >  				status =3D "disabled";
> >  			};
>=20
>=20
> --
>                                                      ~. .~   Tk Open Syst=
ems
> =3D}------------------------------------------------ooO--U--Ooo----------=
--{=3D
>    - baruch@tkos.co.il - tel: +972.52.368.4656,
> https://urldefense.proofpoint.com/v2/url?u=3Dhttp-
> 3A__www.tkos.co.il&d=3DDwIBAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3D-
> N9sN4p5NSr0JGQoQ_2UCOgAqajG99W1EbSOww0WU8o&m=3DF567knLB6kbyr-
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> sw&s=3DeXEBLtBC3CwWIF9XFbHrgSgASz4aMgHi5W1uuXTgdQ4&e=3D  -